comment out XICS/GPIO interrupt test, causes ECP5 litex build to fail
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sun, 11 Oct 2020 13:57:38 +0000 (14:57 +0100)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sun, 11 Oct 2020 13:57:38 +0000 (14:57 +0100)
commit02669870b503ce4832c9343bf17fce579ec49daf
tree383c5f7a42dc5fac7934b25cc7384ac897482032
parent4c743fd5828bfff6bb030a8c9f6f898fec2138dc
comment out XICS/GPIO interrupt test, causes ECP5 litex build to fail
(input incorrectly detected as output)
src/soc/simple/issuer.py