Fix implementation of FMIN/FMAX NaN case
authorAndrew Waterman <andrew@sifive.com>
Thu, 19 Oct 2017 19:18:23 +0000 (12:18 -0700)
committerAndrew Waterman <andrew@sifive.com>
Thu, 19 Oct 2017 19:18:23 +0000 (12:18 -0700)
commit27ffc270f4e08862606e3532a87556e2f16fa87b
tree9ec4bd52bef3ebd3ac138c514a69d03922a1d478
parenta91d9f7d89abd6cda6fafb7b5e7cacf4b3590c29
Fix implementation of FMIN/FMAX NaN case

If rd=rs1 or rd=rs2, the NaN check examined the wrong value.
riscv/insns/fmax_d.h
riscv/insns/fmax_q.h
riscv/insns/fmax_s.h
riscv/insns/fmin_d.h
riscv/insns/fmin_q.h
riscv/insns/fmin_s.h