projects / soc.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: 564852d) | patch
extend CR registers in Decode2ToExecute1Type to 7 bit
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sat, 30 Jan 2021 13:17:45 +0000 (13:17 +0000)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sat, 30 Jan 2021 13:17:45 +0000 (13:17 +0000)
commit28a1332274d6e03aebcf182729cd608c06a24d75
tree10d6718826905b430bc7dd94f2088eb12d70d095tree
parent564852d8f2bff379b4f9d99993ac609e2b2389b9commit | diff
extend CR registers in Decode2ToExecute1Type to 7 bit
src/soc/decoder/decode2execute1.py diff | blob | history
src/soc/decoder/power_decoder2.py diff | blob | history