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(parent: e40b11b) | patch
nir/lower_atomics_to_ssbo: Also lower barriers
authorJason Ekstrand <jason@jlekstrand.net>
Wed, 8 Jan 2020 01:22:13 +0000 (19:22 -0600)
committerMarge Bot <eric+marge@anholt.net>
Mon, 13 Jan 2020 17:23:47 +0000 (17:23 +0000)
commitd3737002eed280ac6362a88f29d6c30d66a1e852
tree51eb4726f8654b07a5e31cf7a758413950542be5tree
parente40b11bbcb02dde1a8f989ca6545e22414c6f4cecommit | diff
nir/lower_atomics_to_ssbo: Also lower barriers

This is more correct for a pass which is supposed to completely lower
away atomic counters.  It also lets us stop supporting atomic counter
barriers in most of the drivers.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3307>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3307>
src/amd/compiler/aco_instruction_selection.cpp diff | blob | history
src/amd/llvm/ac_nir_to_llvm.c diff | blob | history
src/broadcom/compiler/nir_to_vir.c diff | blob | history
src/compiler/nir/nir_lower_atomics_to_ssbo.c diff | blob | history
src/compiler/nir/nir_opt_combine_stores.c diff | blob | history
src/compiler/nir/nir_opt_copy_prop_vars.c diff | blob | history
src/compiler/nir/nir_opt_dead_write_vars.c diff | blob | history
src/freedreno/ir3/ir3_compiler_nir.c diff | blob | history
src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp diff | blob | history
src/intel/compiler/brw_fs_nir.cpp diff | blob | history