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(parent: 7f1b0fd) | patch
PLRU interface signals (acc_i and acc_en) were reversed
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Wed, 5 Jan 2022 14:23:13 +0000 (14:23 +0000)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Wed, 5 Jan 2022 14:23:20 +0000 (14:23 +0000)
commitdc7261551134b24d1de5c801615c52fbec9c346e
treefe7400a5da8b1511248dd2a84c71082cc4ea3cd6tree
parent7f1b0fd46ea0a35603d94b19ff9f94b58340e098commit | diff
PLRU interface signals (acc_i and acc_en) were reversed
(no unit test exists for this module yet)
src/nmutil/plru.py diff | blob | history