Signal the simulator when completing a VL loop
authorCesar Strauss <cestrauss@gmail.com>
Sat, 3 Apr 2021 18:21:37 +0000 (15:21 -0300)
committerCesar Strauss <cestrauss@gmail.com>
Sat, 3 Apr 2021 18:21:37 +0000 (15:21 -0300)
commitfad3cd5f00155f88148c608d3abe85e25c416a11
treeaca9fa0d0cb1ca61ba8cc102e36be362e32e0026
parent8bd650463cac014039535bf6a7ea31f465a4ca9c
Signal the simulator when completing a VL loop

When we reach the end of the VL loop, by skipping masked bits in the
predicate, we still need to synchronize with the Simulator, even if no
instruction was issued.
src/soc/simple/issuer.py