for cell in p.muxed_cells:
cellnum = cell[0]
- cell_bit_width = bwid_template % p.get_muxwidth(cellnum)
+ bitwidth = p.get_muxbitwidth(cellnum)
+ if bitwidth == 0:
+ continue
+ cell_bit_width = bwid_template % bitwidth
bsv_file.write(mux_interface.ifacefmt(cellnum, cell_bit_width))
bsv_file.write("\n endinterface\n")
// values for each mux assigned to a CELL
''')
for cell in p.muxed_cells:
- bsv_file.write(mux_interface.wirefmt(
- cell[0], cell_bit_width))
+ cellnum = cell[0]
+ bitwidth = p.get_muxbitwidth(cellnum)
+ if bitwidth == 0:
+ continue
+ cell_bit_width = bwid_template % bitwidth
+ bsv_file.write(mux_interface.wirefmt(cellnum, cell_bit_width))
iocells.wirefmt(bsv_file)
ifaces.wirefmt(bsv_file)
interface mux_lines = interface MuxSelectionLines
''')
for cell in p.muxed_cells:
+ cellnum = cell[0]
+ bitwidth = p.get_muxbitwidth(cellnum)
+ if bitwidth == 0:
+ continue
+ cell_bit_width = bwid_template % bitwidth
bsv_file.write(
mux_interface.ifacedef(
- cell[0], cell_bit_width))
+ cellnum, cell_bit_width))
bsv_file.write("\n endinterface;")
bsv_file.write('''
def get_muxwidth(self, cellnum):
return self.muxed_cells_width[int(cellnum)]
+ def get_muxbitwidth(self, cellnum):
+ wid = self.get_muxwidth(cellnum)
+ if wid == 1:
+ return 0
+ return int(math.log(wid + 1, 2))
+
if __name__ == '__main__':
p = Parse()