*/
package BootRom;
import defined_types::*;
- `include "defined_parameters.bsv"
+ `include "instance_defines.bsv"
import BRAMCore :: *;
import DReg::*;
import Semi_FIFOF :: *;
/*======================== */
/*==== Project imports ====*/
import defined_types::*;
- `include "defined_parameters.bsv"
+ `include "instance_defines.bsv"
/*=========================*/
interface Ifc_clint;
import ConfigReg :: *;
`define Burst_length_bits 8
-`include "defined_parameters.bsv"
+`include "instance_defines.bsv"
`define verbose
// ================================================================
// DMA requests and responses parameters
import Clocks :: * ;
import DReg ::*;
import defined_types::*;
- `include "defined_parameters.bsv"
+ `include "instance_defines.bsv"
`define Num_DMA_Channels 7
import RegFile::*;
import Clocks :: * ;
import DReg ::*;
- `include "defined_parameters.bsv"
+ `include "instance_defines.bsv"
typedef 2 Num_Masters;
typedef 3 Num_Slaves;
---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
*/
-`include "defined_parameters.bsv"
+`include "instance_defines.bsv"
`define DELAY 250
`define SDR_RFSH_TIMER_W 12
`define SDR_RFSH_ROW_CNT_W 3
import AXI4_Fabric :: *;
import bsvmksdram_model_wrapper :: *;
import Connectable :: *;
-`include "defined_parameters.bsv"
+`include "instance_defines.bsv"
`define DELAY 10200
import sdr_top :: *;
import tb_bsv_wrapper :: *;
import Connectable :: *;
-`include "defined_parameters.bsv"
+`include "instance_defines.bsv"
typedef 1 Num_Masters;
package TCM;
/*====== Porject imports ====*/
import defined_types::*;
- `include "defined_parameters.bsv"
+ `include "instance_defines.bsv"
import Semi_FIFOF :: *;
import AXI4_Types :: *;
import AXI4_Fabric :: *;
package Memory_vme_16;
import defined_types::*;
- `include "defined_parameters.bsv"
+ `include "instance_defines.bsv"
import BRAMCore :: *;
// import TriState ::*;
// import DReg::*;
package Memory_vme_32;
import defined_types::*;
- `include "defined_parameters.bsv"
+ `include "instance_defines.bsv"
import BRAMCore :: *;
`include "vme_parameters.bsv"
package Memory_vme_8;
import defined_types::*;
- `include "defined_parameters.bsv"
+ `include "instance_defines.bsv"
import BRAMCore :: *;
/*========= Project imports ======== */
`include "vme_parameters.bsv"
- `include "defined_parameters.bsv"
+ `include "instance_defines.bsv"
import defined_types ::*;
import FIFOF ::*;
import vme_master :: *;
import AXI4_Types::*;
import AXI4_Fabric::*;
`include "defines.bsv"
- `include "defined_parameters.bsv"
+ `include "instance_defines.bsv"
import defined_types::*;
import core :: *;
/*========================= */
package MemoryMap;
/*=== Project imports ==== */
import defined_types::*;
- `include "defined_parameters.bsv"
+ `include "instance_defines.bsv"
/*========================= */