Add FreedomU500 & incorporate feedback

diff --git a/debug/gdbserver.py b/debug/gdbserver.py
index 9d6f781b6b1fd7527942d7a0f1fefcc1dff18020..f3c111a78aeac3ac5bc3953ec9ed2901ee36b73c 100755 (executable)
--- a/debug/gdbserver.py
+++ b/debug/gdbserver.py
@@ -31,12 +31,29 @@ MSTATUS_VM = 0x1F000000
 MSTATUS32_SD = 0x80000000
 MSTATUS64_SD = 0x8000000000000000
 
-def gdb():
+def gdb(
+        target=None,
+        port=None,
+        binary=None
+        ):
+
+    gdb = None
     if parsed.gdb:
-        return testlib.Gdb(parsed.gdb)
+        gdb = testlib.Gdb(parsed.gdb)
     else:
-        return testlib.Gdb()
+        gdb =  testlib.Gdb()
+
+    if (binary):
+        gdb.command("file %s" % self.binary)
+    if (target):
+        gdb.command("set arch riscv:rv%d" % target.xlen)
+        gdb.command("set remotetimeout %d" % target.timeout_sec)
+    if (port):
+        gdb.command("target extended-remote localhost:%d" % port)
 
+    return gdb
+
+        
 def ihex_line(address, record_type, data):
     assert len(data) < 128
     line = ":%02X%04X%02X" % (len(data), address, record_type)
@@ -69,13 +86,8 @@ class DeleteServer(unittest.TestCase):
 class SimpleRegisterTest(DeleteServer):
     def setUp(self):
         self.server = target.server()
-        self.gdb = gdb()
-        # For now gdb has to be told what the architecture is when it's not
-        # given an ELF file.
-        self.gdb.command("set arch riscv:rv%d" % target.xlen)
-        self.gdb.command("set remotetimeout %d" % target.timeout)
-        self.gdb.command("target extended-remote localhost:%d" % self.server.port)
-       
+        self.gdb = gdb(target, self.server.port)
+
         # 0x13 is nop
         self.gdb.command("p *((int*) 0x%x)=0x13" % target.ram)
         self.gdb.command("p *((int*) 0x%x)=0x13" % (target.ram + 4))
@@ -111,10 +123,7 @@ class SimpleRegisterTest(DeleteServer):
 class SimpleMemoryTest(DeleteServer):
     def setUp(self):
         self.server = target.server()
-        self.gdb = gdb()
-        self.gdb.command("set arch riscv:rv%d" % target.xlen)
-        self.gdb.command("set remotetimeout %d" % target.timeout)
-        self.gdb.command("target extended-remote localhost:%d" % self.server.port)
+        self.gdb = gdb(target, self.server.port)
 
     def access_test(self, size, data_type):
         self.assertEqual(self.gdb.p("sizeof(%s)" % data_type),
@@ -169,10 +178,7 @@ class SimpleMemoryTest(DeleteServer):
 class InstantHaltTest(DeleteServer):
     def setUp(self):
         self.server = target.server()
-        self.gdb = gdb()
-        self.gdb.command("set arch riscv:rv%d" % target.xlen)
-        self.gdb.command("set remotetimeout %d" % target.timeout)
-        self.gdb.command("target extended-remote localhost:%d" % self.server.port)
+        self.gdb = gdb(target, self.server.port)
          
     def test_instant_halt(self):
         self.assertEqual(target.reset_vector, self.gdb.p("$pc"))
@@ -201,10 +207,7 @@ class DebugTest(DeleteServer):
         self.binary = target.compile("programs/debug.c", "programs/checksum.c",
                 "programs/tiny-malloc.c", "-DDEFINE_MALLOC", "-DDEFINE_FREE")
         self.server = target.server()
-        self.gdb = gdb()
-        self.gdb.command("file %s" % self.binary)
-        self.gdb.command("set remotetimeout %d" % target.timeout)
-        self.gdb.command("target extended-remote localhost:%d" % self.server.port)
+        self.gdb = gdb(target, self.server.port, self.binary)
         self.gdb.load()
         self.gdb.b("_exit")
 
@@ -355,10 +358,7 @@ class StepTest(DeleteServer):
     def setUp(self):
         self.binary = target.compile("programs/step.S")
         self.server = target.server()
-        self.gdb = gdb()
-        self.gdb.command("file %s" % self.binary)
-        self.gdb.command("set remotetimeout %d" % target.timeout)
-        self.gdb.command("target extended-remote localhost:%d" % self.server.port)
+        self.gdb = gdb(target, self.server.port, self.binary)
         self.gdb.load()
         self.gdb.b("main")
         self.gdb.c()
@@ -374,10 +374,7 @@ class RegsTest(DeleteServer):
     def setUp(self):
         self.binary = target.compile("programs/regs.S")
         self.server = target.server()
-        self.gdb = gdb()
-        self.gdb.command("file %s" % self.binary)
-        self.gdb.command("set remotetimeout %d" % target.timeout)
-        self.gdb.command("target extended-remote localhost:%d" % self.server.port)
+        self.gdb = gdb(target, self.server.port, self.binary)
         self.gdb.load()
         self.gdb.b("main")
         self.gdb.b("handle_trap")
@@ -445,10 +442,7 @@ class DownloadTest(DeleteServer):
 
         self.binary = target.compile(download_c.name, "programs/checksum.c")
         self.server = target.server()
-        self.gdb = gdb()
-        self.gdb.command("file %s" % self.binary)
-        self.gdb.command("set remotetimeout %d" % target.timeout)
-        self.gdb.command("target extended-remote localhost:%d" % self.server.port)
+        self.gdb = gdb(target, self.server.port, self.binary)
         
     def test_download(self):
         output = self.gdb.load()
@@ -460,10 +454,7 @@ class MprvTest(DeleteServer):
     def setUp(self):
         self.binary = target.compile("programs/mprv.S")
         self.server = target.server()
-        self.gdb = gdb()
-        self.gdb.command("file %s" % self.binary)
-        self.gdb.command("set remotetimeout %d" % target.timeout)
-        self.gdb.command("target extended-remote localhost:%d" % self.server.port)
+        self.gdb = gdb(target, self.server.port, self.binary)
         self.gdb.load()
 
     def test_mprv(self):
@@ -478,10 +469,7 @@ class PrivTest(DeleteServer):
     def setUp(self):
         self.binary = target.compile("programs/priv.S")
         self.server = target.server()
-        self.gdb = gdb()
-        self.gdb.command("file %s" % self.binary)
-        self.gdb.command("set remotetimeout %d" % target.timeout)
-        self.gdb.command("target extended-remote localhost:%d" % self.server.port)
+        self.gdb = gdb(target, self.server.port, self.binary)
         self.gdb.load()
 
         misa = self.gdb.p("$misa")
@@ -529,7 +517,7 @@ class PrivTest(DeleteServer):
 
 class Target(object):
     directory = None
-    timeout = 2
+    timeout_sec = 2
     
     def server(self):
         raise NotImplementedError
@@ -587,40 +575,51 @@ class FreedomE300Target(Target):
 class FreedomE300SimTarget(Target):
     name = "freedom-e300-sim"
     xlen = 32
-    timeout = 240
+    timeout_sec = 240
     ram = 0x80000000
     ram_size = 256 * 1024 * 1024
     instruction_hardware_breakpoint_count = 2
        
     def server(self):
         sim = testlib.VcsSim(simv=parsed.run, debug=False)
-        x = testlib.Openocd(cmd=parsed.cmd,
+        openocd = testlib.Openocd(cmd=parsed.cmd,
                             config="targets/%s/openocd.cfg" % self.name,
                             otherProcess = sim)
         time.sleep(20)
-        return x
+        return openocd
+
+class FreedomU500Target(Target):
+    name = "freedom-u500"
+    xlen = 64
+    ram = 0x80000000
+    ram_size = 16 * 1024
+    instruction_hardware_breakpoint_count = 2
 
+    def server(self):
+        return testlib.Openocd(cmd=parsed.cmd,
+                config="targets/%s/openocd.cfg" % self.name)
     
 class FreedomU500SimTarget(Target):
     name = "freedom-u500-sim"
     xlen = 64
-    timeout = 240
+    timeout_sec = 240
     ram = 0x80000000
     ram_size = 256 * 1024 * 1024
     instruction_hardware_breakpoint_count = 2
        
     def server(self):
         sim = testlib.VcsSim(simv=parsed.run, debug=False)
-        x = testlib.Openocd(cmd=parsed.cmd,
+        openocd = testlib.Openocd(cmd=parsed.cmd,
                             config="targets/%s/openocd.cfg" % self.name,
                             otherProcess = sim)
         time.sleep(20)
-        return x
+        return openocd
 
 targets = [
         Spike32Target,
         Spike64Target,
         FreedomE300Target,
+        FreedomU500Target,
         FreedomE300SimTarget,
         FreedomU500SimTarget]
 
@@ -655,7 +654,7 @@ def main():
 
 # TROUBLESHOOTING TIPS
 # If a particular test fails, run just that one test, eg.:
-# ./tests/gdbserver.py MprvTest.test_mprv
+# ./gdbserver.py MprvTest.test_mprv
 # Then inspect gdb.log and spike.log to see what happened in more detail.
 
 if __name__ == '__main__':

diff --git a/debug/targets/freedom-e300-sim/openocd.cfg b/debug/targets/freedom-e300-sim/openocd.cfg
index 767d22963de48571f4efe9bfa35bce9350897f94..e8edda4e6c660392c0deb3913c5fdb30d12b0f5c 100644 (file)
--- a/debug/targets/freedom-e300-sim/openocd.cfg
+++ b/debug/targets/freedom-e300-sim/openocd.cfg
@@ -8,12 +8,6 @@ jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x10e31913
 set _TARGETNAME $_CHIPNAME.cpu
 target create $_TARGETNAME riscv -chain-position $_TARGETNAME
 
-#reset_config trst_and_srst separate
-# Stupid long so I can see the LEDs
-#adapter_nsrst_delay 2000
-#jtag_ntrst_delay 1000
-#
 init
-#reset
 
 halt

diff --git a/debug/targets/freedom-e300/openocd.cfg b/debug/targets/freedom-e300/openocd.cfg
index 3884a3ee042a34de6f56dbd5f4d87f4bcc25babf..d448989243ecc7d893ed4eca399eb2d62b737c76 100644 (file)
--- a/debug/targets/freedom-e300/openocd.cfg
+++ b/debug/targets/freedom-e300/openocd.cfg
@@ -8,12 +8,6 @@ jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x10e31913
 set _TARGETNAME $_CHIPNAME.cpu
 target create $_TARGETNAME riscv -chain-position $_TARGETNAME
 
-#reset_config trst_and_srst separate
-# Stupid long so I can see the LEDs
-#adapter_nsrst_delay 2000
-#jtag_ntrst_delay 1000
-#
 init
-#reset
 
 halt

diff --git a/debug/targets/freedom-u500-sim/openocd.cfg b/debug/targets/freedom-u500-sim/openocd.cfg
index 767d22963de48571f4efe9bfa35bce9350897f94..e8edda4e6c660392c0deb3913c5fdb30d12b0f5c 100644 (file)
--- a/debug/targets/freedom-u500-sim/openocd.cfg
+++ b/debug/targets/freedom-u500-sim/openocd.cfg
@@ -8,12 +8,6 @@ jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x10e31913
 set _TARGETNAME $_CHIPNAME.cpu
 target create $_TARGETNAME riscv -chain-position $_TARGETNAME
 
-#reset_config trst_and_srst separate
-# Stupid long so I can see the LEDs
-#adapter_nsrst_delay 2000
-#jtag_ntrst_delay 1000
-#
 init
-#reset
 
 halt

diff --git a/debug/targets/freedom-u500/link.lds b/debug/targets/freedom-u500/link.lds
new file mode 100755 (executable)
index 0000000..1dbb99c
--- /dev/null
+++ b/debug/targets/freedom-u500/link.lds
@@ -0,0 +1,34 @@
+OUTPUT_ARCH( "riscv" )
+
+SECTIONS
+{
+  . = 0x80000000;
+  .text : 
+  {
+    *(.text.entry)
+    *(.text)
+  }
+
+  /* data segment */
+  .data : { *(.data) }
+
+  .sdata : {
+    _gp = . + 0x800;
+    *(.srodata.cst16) *(.srodata.cst8) *(.srodata.cst4) *(.srodata.cst2)
+    *(.srodata*)
+    *(.sdata .sdata.* .gnu.linkonce.s.*)
+  }
+
+  /* bss segment */
+  .sbss : {
+    *(.sbss .sbss.* .gnu.linkonce.sb.*)
+    *(.scommon)
+  }
+  .bss : { *(.bss) }
+
+  __malloc_start = .;
+  . = . + 512;
+
+  /* End of uninitalized data segement */
+  _end = .;
+}

diff --git a/debug/targets/freedom-u500/openocd.cfg b/debug/targets/freedom-u500/openocd.cfg
new file mode 100644 (file)
index 0000000..d448989
--- /dev/null
+++ b/debug/targets/freedom-u500/openocd.cfg
@@ -0,0 +1,13 @@
+adapter_khz     10000
+
+source [find interface/ftdi/olimex-arm-usb-tiny-h.cfg]
+
+set _CHIPNAME riscv
+jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x10e31913
+
+set _TARGETNAME $_CHIPNAME.cpu
+target create $_TARGETNAME riscv -chain-position $_TARGETNAME
+
+init
+
+halt