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rename blackboxes to lowercase, spblock_512w64b8w, pll
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sun, 18 Apr 2021 20:20:50 +0000 (20:20 +0000)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sun, 18 Apr 2021 20:20:50 +0000 (20:20 +0000)
experiments9/Makefile patch | blob | history
experiments9/tsmc_c018/Makefile patch | blob | history

diff --git a/experiments9/Makefile b/experiments9/Makefile
index 79802fcf481ba90930c12a307b98a6db9ce9420f..1bff40f617e1635eeaf99f0bd75936620a2e395a 100755 (executable)
--- a/experiments9/Makefile
+++ b/experiments9/Makefile
@@ -3,7 +3,7 @@
        PHYSICAL_SYNTHESIS = Coriolis
                DESIGN_KIT = cmos45
             YOSYS_FLATTEN = No
-         YOSYS_BLACKBOXES = SPBlock_512W64B8W
+         YOSYS_BLACKBOXES = spblock_512w64b8w pll
 #            YOSYS_SET_TOP = Yes
                     CHIP  = chip
                     CORE  = ls180
diff --git a/experiments9/tsmc_c018/Makefile b/experiments9/tsmc_c018/Makefile
index 23ff0be512b543a0c3bc8a5bfb653744b4956b1a..0713bdb4c08f85d38aa354515fe76356688848cd 100755 (executable)
--- a/experiments9/tsmc_c018/Makefile
+++ b/experiments9/tsmc_c018/Makefile
@@ -4,7 +4,7 @@
                DESIGN_KIT = FlexLib018
 #              DESIGN_KIT = cmos45
             YOSYS_FLATTEN = No
-        YOSYS_BLACKBOXES = SPBlock_512W64B8W
+        YOSYS_BLACKBOXES = spblock_512w64b8w pll
 #            YOSYS_SET_TOP = Yes
                     CHIP  = chip
                     CORE  = ls180