Reduce core size.
authorStaf Verhaegen <staf@stafverhaegen.be>
Mon, 12 Apr 2021 11:24:28 +0000 (13:24 +0200)
committerStaf Verhaegen <staf@stafverhaegen.be>
Mon, 12 Apr 2021 11:25:05 +0000 (13:25 +0200)
Using 45nm cells makes the design Pad limited.

experiments9/freepdk_c4m45/doDesign.py

index b39f53f18e496c27c9b4734e0db7ed7b6c8f78fa..6648fe0516eb3768de8dcdfef8d2932095201f5c 100644 (file)
@@ -135,8 +135,8 @@ def scriptMain (**kw):
    #helpers.setTraceLevel( 550 )
    #Breakpoint.setStopLevel( 100 )
     rvalue     = True
-   #coreSize   = u(37*90.0)
-    coreSize   = u(59*90.0)
+    coreSize   = u(37*90.0)
+   #coreSize   = u(59*90.0)
     chipBorder = u(2*214.0 + 10*13.0)
     ioSpecs    = IoSpecs()
     pinmuxFile = './ls180/litex_pinpads.json'