freedreno: drop needs_rb_fbd
authorRob Clark <robdclark@gmail.com>
Tue, 19 Jul 2016 17:22:01 +0000 (13:22 -0400)
committerRob Clark <robdclark@gmail.com>
Sat, 30 Jul 2016 13:23:42 +0000 (09:23 -0400)
We need to emit RB_FRAME_BUFFER_DIMENSION once per batch.. tracking this
in fd_context is wrong when the gmem code executes asynchronously from
the flush_queue worker.  But in fact we don't really need to track it at
all.  We cannot assume previous value at the beginning of the batch
(because of other processes potentially using the GPU), so just drop the
tracking and emit it in _tile_init().

Signed-off-by: Rob Clark <robdclark@gmail.com>
src/gallium/drivers/freedreno/a3xx/fd3_emit.c
src/gallium/drivers/freedreno/a3xx/fd3_gmem.c
src/gallium/drivers/freedreno/a4xx/fd4_emit.c
src/gallium/drivers/freedreno/a4xx/fd4_gmem.c
src/gallium/drivers/freedreno/freedreno_context.h
src/gallium/drivers/freedreno/freedreno_state.c

index 0aef89f4054e61a793bfa6e095246af2d82304d3..0fb2ee1181f041b7998eb701a1456c8175034c7b 100644 (file)
@@ -896,8 +896,6 @@ fd3_emit_restore(struct fd_batch *batch, struct fd_ringbuffer *ring)
        fd_wfi(batch, ring);
 
        fd_hw_query_enable(batch, ring);
-
-       ctx->needs_rb_fbd = true;
 }
 
 static void
index 34e0e39aad707b5a48dcf74bb2174963c2e86849..ec0a77b414006c9d8290560be08622d386974ff6 100644 (file)
@@ -924,6 +924,7 @@ static void
 fd3_emit_tile_init(struct fd_batch *batch)
 {
        struct fd_ringbuffer *ring = batch->gmem;
+       struct pipe_framebuffer_state *pfb = &batch->framebuffer;
        struct fd_gmem_stateobj *gmem = &batch->ctx->gmem;
        uint32_t rb_render_control;
 
@@ -938,6 +939,11 @@ fd3_emit_tile_init(struct fd_batch *batch)
 
        update_vsc_pipe(batch);
 
+       fd_wfi(batch, ring);
+       OUT_PKT0(ring, REG_A3XX_RB_FRAME_BUFFER_DIMENSION, 1);
+       OUT_RING(ring, A3XX_RB_FRAME_BUFFER_DIMENSION_WIDTH(pfb->width) |
+                       A3XX_RB_FRAME_BUFFER_DIMENSION_HEIGHT(pfb->height));
+
        if (use_hw_binning(batch)) {
                /* emit hw binning pass: */
                emit_binning_pass(batch);
@@ -957,18 +963,9 @@ fd3_emit_tile_init(struct fd_batch *batch)
 static void
 fd3_emit_tile_prep(struct fd_batch *batch, struct fd_tile *tile)
 {
-       struct fd_context *ctx = batch->ctx;
        struct fd_ringbuffer *ring = batch->gmem;
        struct pipe_framebuffer_state *pfb = &batch->framebuffer;
 
-       if (ctx->needs_rb_fbd) {
-               fd_wfi(batch, ring);
-               OUT_PKT0(ring, REG_A3XX_RB_FRAME_BUFFER_DIMENSION, 1);
-               OUT_RING(ring, A3XX_RB_FRAME_BUFFER_DIMENSION_WIDTH(pfb->width) |
-                               A3XX_RB_FRAME_BUFFER_DIMENSION_HEIGHT(pfb->height));
-               ctx->needs_rb_fbd = false;
-       }
-
        OUT_PKT0(ring, REG_A3XX_RB_MODE_CONTROL, 1);
        OUT_RING(ring, A3XX_RB_MODE_CONTROL_RENDER_MODE(RB_RENDERING_PASS) |
                        A3XX_RB_MODE_CONTROL_MARB_CACHE_SPLIT_MODE |
index 7ddb38a588b588b33c57d595cf4ab39a6ef77343..e0f413f41e64f7e332d5d0430c087f81cf24adf4 100644 (file)
@@ -887,8 +887,6 @@ fd4_emit_restore(struct fd_batch *batch, struct fd_ringbuffer *ring)
        OUT_RING(ring, 0x0);
 
        fd_hw_query_enable(batch, ring);
-
-       ctx->needs_rb_fbd = true;
 }
 
 static void
index d9b0631306dd52567abdac3f8cfd1e1dd7462131..32541fe06f02f8fe7b584e6d5e12f2bdd5856d28 100644 (file)
@@ -664,6 +664,7 @@ static void
 fd4_emit_tile_init(struct fd_batch *batch)
 {
        struct fd_ringbuffer *ring = batch->gmem;
+       struct pipe_framebuffer_state *pfb = &batch->framebuffer;
        struct fd_gmem_stateobj *gmem = &batch->ctx->gmem;
 
        fd4_emit_restore(batch, ring);
@@ -674,6 +675,11 @@ fd4_emit_tile_init(struct fd_batch *batch)
 
        update_vsc_pipe(batch);
 
+       fd_wfi(batch, ring);
+       OUT_PKT0(ring, REG_A4XX_RB_FRAME_BUFFER_DIMENSION, 1);
+       OUT_RING(ring, A4XX_RB_FRAME_BUFFER_DIMENSION_WIDTH(pfb->width) |
+                       A4XX_RB_FRAME_BUFFER_DIMENSION_HEIGHT(pfb->height));
+
        if (use_hw_binning(batch)) {
                OUT_PKT0(ring, REG_A4XX_RB_MODE_CONTROL, 1);
                OUT_RING(ring, A4XX_RB_MODE_CONTROL_WIDTH(gmem->bin_w) |
@@ -744,14 +750,6 @@ fd4_emit_tile_prep(struct fd_batch *batch, struct fd_tile *tile)
        } else {
                OUT_RING(ring, A4XX_GRAS_DEPTH_CONTROL_FORMAT(DEPTH4_NONE));
        }
-
-       if (ctx->needs_rb_fbd) {
-               fd_wfi(batch, ring);
-               OUT_PKT0(ring, REG_A4XX_RB_FRAME_BUFFER_DIMENSION, 1);
-               OUT_RING(ring, A4XX_RB_FRAME_BUFFER_DIMENSION_WIDTH(pfb->width) |
-                               A4XX_RB_FRAME_BUFFER_DIMENSION_HEIGHT(pfb->height));
-               ctx->needs_rb_fbd = false;
-       }
 }
 
 /* before IB to rendering cmds: */
index 557e3715b3bb25eec7e0e1607d407c25619bc361..7b84ea99cbd4cefb71cccfcaaaf62e5cbf928a08 100644 (file)
@@ -176,12 +176,6 @@ struct fd_context {
         */
        bool in_blit : 1;
 
-       /* Do we need to re-emit RB_FRAME_BUFFER_DIMENSION?  At least on a3xx
-        * it is not a banked context register, so it needs a WFI to update.
-        * Keep track if it has actually changed, to avoid unneeded WFI.
-        * */
-       bool needs_rb_fbd : 1;
-
        struct pipe_scissor_state scissor;
 
        /* we don't have a disable/enable bit for scissor, so instead we keep
index 6dad07515a18c3d60ae164c36fecc72535b6443d..8c9040545c231e226353b2a5980bce6f9fca738c 100644 (file)
@@ -150,10 +150,6 @@ fd_set_framebuffer_state(struct pipe_context *pctx,
 
        cso = &ctx->batch->framebuffer;
 
-       if ((cso->width != framebuffer->width) ||
-                       (cso->height != framebuffer->height))
-               ctx->needs_rb_fbd = true;
-
        util_copy_framebuffer_state(cso, framebuffer);
 
        ctx->dirty |= FD_DIRTY_FRAMEBUFFER;