fd_wfi(batch, ring);
fd_hw_query_enable(batch, ring);
-
- ctx->needs_rb_fbd = true;
}
static void
fd3_emit_tile_init(struct fd_batch *batch)
{
struct fd_ringbuffer *ring = batch->gmem;
+ struct pipe_framebuffer_state *pfb = &batch->framebuffer;
struct fd_gmem_stateobj *gmem = &batch->ctx->gmem;
uint32_t rb_render_control;
update_vsc_pipe(batch);
+ fd_wfi(batch, ring);
+ OUT_PKT0(ring, REG_A3XX_RB_FRAME_BUFFER_DIMENSION, 1);
+ OUT_RING(ring, A3XX_RB_FRAME_BUFFER_DIMENSION_WIDTH(pfb->width) |
+ A3XX_RB_FRAME_BUFFER_DIMENSION_HEIGHT(pfb->height));
+
if (use_hw_binning(batch)) {
/* emit hw binning pass: */
emit_binning_pass(batch);
static void
fd3_emit_tile_prep(struct fd_batch *batch, struct fd_tile *tile)
{
- struct fd_context *ctx = batch->ctx;
struct fd_ringbuffer *ring = batch->gmem;
struct pipe_framebuffer_state *pfb = &batch->framebuffer;
- if (ctx->needs_rb_fbd) {
- fd_wfi(batch, ring);
- OUT_PKT0(ring, REG_A3XX_RB_FRAME_BUFFER_DIMENSION, 1);
- OUT_RING(ring, A3XX_RB_FRAME_BUFFER_DIMENSION_WIDTH(pfb->width) |
- A3XX_RB_FRAME_BUFFER_DIMENSION_HEIGHT(pfb->height));
- ctx->needs_rb_fbd = false;
- }
-
OUT_PKT0(ring, REG_A3XX_RB_MODE_CONTROL, 1);
OUT_RING(ring, A3XX_RB_MODE_CONTROL_RENDER_MODE(RB_RENDERING_PASS) |
A3XX_RB_MODE_CONTROL_MARB_CACHE_SPLIT_MODE |
OUT_RING(ring, 0x0);
fd_hw_query_enable(batch, ring);
-
- ctx->needs_rb_fbd = true;
}
static void
fd4_emit_tile_init(struct fd_batch *batch)
{
struct fd_ringbuffer *ring = batch->gmem;
+ struct pipe_framebuffer_state *pfb = &batch->framebuffer;
struct fd_gmem_stateobj *gmem = &batch->ctx->gmem;
fd4_emit_restore(batch, ring);
update_vsc_pipe(batch);
+ fd_wfi(batch, ring);
+ OUT_PKT0(ring, REG_A4XX_RB_FRAME_BUFFER_DIMENSION, 1);
+ OUT_RING(ring, A4XX_RB_FRAME_BUFFER_DIMENSION_WIDTH(pfb->width) |
+ A4XX_RB_FRAME_BUFFER_DIMENSION_HEIGHT(pfb->height));
+
if (use_hw_binning(batch)) {
OUT_PKT0(ring, REG_A4XX_RB_MODE_CONTROL, 1);
OUT_RING(ring, A4XX_RB_MODE_CONTROL_WIDTH(gmem->bin_w) |
} else {
OUT_RING(ring, A4XX_GRAS_DEPTH_CONTROL_FORMAT(DEPTH4_NONE));
}
-
- if (ctx->needs_rb_fbd) {
- fd_wfi(batch, ring);
- OUT_PKT0(ring, REG_A4XX_RB_FRAME_BUFFER_DIMENSION, 1);
- OUT_RING(ring, A4XX_RB_FRAME_BUFFER_DIMENSION_WIDTH(pfb->width) |
- A4XX_RB_FRAME_BUFFER_DIMENSION_HEIGHT(pfb->height));
- ctx->needs_rb_fbd = false;
- }
}
/* before IB to rendering cmds: */
*/
bool in_blit : 1;
- /* Do we need to re-emit RB_FRAME_BUFFER_DIMENSION? At least on a3xx
- * it is not a banked context register, so it needs a WFI to update.
- * Keep track if it has actually changed, to avoid unneeded WFI.
- * */
- bool needs_rb_fbd : 1;
-
struct pipe_scissor_state scissor;
/* we don't have a disable/enable bit for scissor, so instead we keep
cso = &ctx->batch->framebuffer;
- if ((cso->width != framebuffer->width) ||
- (cso->height != framebuffer->height))
- ctx->needs_rb_fbd = true;
-
util_copy_framebuffer_state(cso, framebuffer);
ctx->dirty |= FD_DIRTY_FRAMEBUFFER;