projects
/
soc.git
/ commitdiff
commit
grep
author
committer
pickaxe
?
search:
re
summary
|
shortlog
|
log
|
commit
| commitdiff |
tree
raw
|
patch
| inline |
side by side
(parent:
64bbbc9
)
8-bit granularity on JTAG wishbone
author
Luke Kenneth Casson Leighton
<lkcl@lkcl.net>
Tue, 6 Apr 2021 20:38:04 +0000
(21:38 +0100)
committer
Luke Kenneth Casson Leighton
<lkcl@lkcl.net>
Tue, 6 Apr 2021 20:38:08 +0000
(21:38 +0100)
src/soc/debug/jtag.py
patch
|
blob
|
history
diff --git
a/src/soc/debug/jtag.py
b/src/soc/debug/jtag.py
index 5cac2cd44c8868efbaa0ac4e0148a9f6a5d11be2..c2a6f0958a86ce1f94ec6a539e9ca08f3b16b8ba 100644
(file)
--- a/
src/soc/debug/jtag.py
+++ b/
src/soc/debug/jtag.py
@@
-82,6
+82,7
@@
class JTAG(DMITAP, Pins):
# create and connect wishbone
self.wb = self.add_wishbone(ircodes=[5, 6, 7], features={'err'},
address_width=29, data_width=wb_data_wid,
+ granularity=8, # 8-bit wide
name="jtag_wb")
# create DMI2JTAG (goes through to dmi_sim())