bring external irq out for microwatt-compatible mode in testissuer
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Mon, 3 Jan 2022 19:00:46 +0000 (19:00 +0000)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Mon, 3 Jan 2022 19:00:46 +0000 (19:00 +0000)
src/soc/simple/issuer.py

index 1384616089190b409a2cbe7e6bccea76bbca7963..85ea892f34e35b1970be79a742ee3d519d577129 100644 (file)
@@ -226,6 +226,8 @@ class TestIssuerBase(Elaboratable):
             self.xics_icp = XICS_ICP()
             self.xics_ics = XICS_ICS()
             self.int_level_i = self.xics_ics.int_level_i
+        else:
+            self.ext_irq = Signal()
 
         # add GPIO peripheral?
         self.gpio = hasattr(pspec, "gpio") and pspec.gpio == True
@@ -346,6 +348,8 @@ class TestIssuerBase(Elaboratable):
             m.submodules.xics_ics = ics = csd(self.xics_ics)
             comb += icp.ics_i.eq(ics.icp_o)           # connect ICS to ICP
             sync += cur_state.eint.eq(icp.core_irq_o)  # connect ICP to core
+        else:
+            sync += cur_state.eint.eq(self.ext_irq)  # connect externally
 
         # GPIO test peripheral
         if self.gpio:
@@ -625,6 +629,8 @@ class TestIssuerBase(Elaboratable):
             ports += list(self.xics_icp.bus.fields.values())
             ports += list(self.xics_ics.bus.fields.values())
             ports.append(self.int_level_i)
+        else:
+            ports.append(self.ext_irq)
 
         if self.gpio:
             ports += list(self.simple_gpio.bus.fields.values())