hmmm, branch sets nia to Data as well and sets nia.ok if branch should occur

therefore do the same thing?

diff --git a/src/soc/fu/trap/main_stage.py b/src/soc/fu/trap/main_stage.py
index db688475f1d5ddf5f706051cdf8744c7d5be5a06..c29ac0a83f7cd78185c800e0d10b1afa98531bee 100644 (file)
--- a/src/soc/fu/trap/main_stage.py
+++ b/src/soc/fu/trap/main_stage.py
@@ -83,7 +83,8 @@ class LogicalMainStage(PipeModBase):
         with m.Switch(op):
             with m.Case(InternalOp.OP_TRAP):
                 with m.If(should_trap):
-                    comb += self.o.nia.eq(0x700)         # trap address
+                    comb += self.o.nia.data.eq(0x700)         # trap address
+                    comb += self.o.nia.ok.eq(1)
                     comb += self.o.srr1.data.eq(self.i.msr)   # old MSR
                     comb += self.o.srr1[63-46].eq(1)     # XXX which bit?
                     comb += self.o.srr1.ok.eq(1)
@@ -91,6 +92,5 @@ class LogicalMainStage(PipeModBase):
                     comb += self.o.srr0.ok.eq(1)
 
         comb += self.o.ctx.eq(self.i.ctx)
-        comb += self.o.should_trap.eq(should_trap)
 
         return m

diff --git a/src/soc/fu/trap/pipe_data.py b/src/soc/fu/trap/pipe_data.py
index 6789684fe59a373960905b3c8a6379b5fcd3cf48..ebe34fd64118517975f5903cbe23cd0f8eacd71e 100644 (file)
--- a/src/soc/fu/trap/pipe_data.py
+++ b/src/soc/fu/trap/pipe_data.py
@@ -28,11 +28,10 @@ class TrapInputData(IntegerData):
 class TrapOutputData(IntegerData):
     def __init__(self, pspec):
         super().__init__(pspec)
-        self.nia = Signal(64, reset_less=True) # NIA (Next PC)
+        self.nia = Data(64, name="nia") # NIA (Next PC)
         self.msr = Signal(64, reset_less=True) # MSR
         self.srr0 = Data(64, name="srr0") # SRR0 SPR
         self.srr1 = Data(64, name="srr1") # SRR1 SPR
-        self.should_trap = Signal(reset_less=True)
 
     def __iter__(self):
         yield from super().__iter__()
@@ -40,11 +39,8 @@ class TrapOutputData(IntegerData):
         yield self.msr
         yield self.srr0
         yield self.srr1
-        yield self.should_trap
 
     def eq(self, i):
         lst = super().eq(i)
-        return lst + [
-            self.nia.eq(i.nia), self.msr.eq(i.msr),
-            self.srr0.eq(i.srr0), self.srr1.eq(i.srr1),
-            self.should_trap.eq(i.should_trap)]
+        return lst + [ self.nia.eq(i.nia), self.msr.eq(i.msr),
+                      self.srr0.eq(i.srr0), self.srr1.eq(i.srr1)]