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framebuffer: fake DMA for testing (WIP)
[litex.git]
/
constraints.py
2012-07-01
Sebastien Bourdeauducq
Work around imbecilic timing constraints system
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2012-06-17
Sebastien Bourdeauducq
VGA framebuffer connections
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2012-05-19
Sebastien Bourdeauducq
Add Ethernet MAC
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2012-04-02
Sebastien Bourdeauducq
Remove uses of pads, new constraints system
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2012-02-19
Sebastien Bourdeauducq
s6ddrphy: clock, address and command
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2012-02-19
Sebastien Bourdeauducq
Prepare for new DDR PHY
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2012-02-17
Sebastien Bourdeauducq
Connect DDR PHY
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2012-02-16
Sebastien Bourdeauducq
Generate all clocks for the DDR PHY
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2011-12-17
Sebastien Bourdeauducq
Multiply system clock
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2011-12-16
Sebastien Bourdeauducq
Proper reset generation
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2011-12-16
Sebastien Bourdeauducq
Pay a bit more attention to PEP8
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2011-12-13
Sebastien Bourdeauducq
Initial import
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