gen/sim/vcd: allow continous update of vcd file and dynamic signals
[litex.git] / litex / gen / fhdl / simplify.py
2016-03-23 Florent Kermarrecgen/sim, fhdl: remove port.we_granularity limitation...
2016-03-21 Florent Kermarrecgen/build: merge with migen 0575c749e35a7180f0dca408e42...
2015-11-13 Florent Kermarreclitex/gen: reintegrate migen with modifications to...
2015-11-11 Florent Kermarrecavoid forking migen, we will add custom modules in...
2015-11-07 Florent Kermarreclitex: reorganize things, first work working version