gen/sim, fhdl: remove port.we_granularity limitation on simulations
[litex.git] / litex / gen /
2016-03-23 Florent Kermarrecgen/sim, fhdl: remove port.we_granularity limitation...
2016-03-21 Florent Kermarrecgen: add missing sim files
2016-03-21 Florent Kermarrecgen: remove vpi (no longer used)
2016-03-21 Florent Kermarrecgen/build: merge with migen 0575c749e35a7180f0dca408e42...
2016-02-11 Florent Kermarrecgen/build: use verilog 2001-style synthesis attributes...
2015-12-02 Florent Kermarrecgen/fhdl/verilog: add regular comb parameter to allow...
2015-11-30 Florent Kermarrecgen/build: use name_override for all IOs defined in...
2015-11-16 Florent Kermarrecbuild: remove edif support
2015-11-16 Florent Kermarrecgen/fhdl/verilog: remove asic_syntax and expose reg_ini...
2015-11-14 Florent Kermarrecadd TODOs
2015-11-13 Florent Kermarrecfor now use our fork of migen (to be able to simulate...
2015-11-13 Florent Kermarreclitex/gen: reintegrate migen with modifications to...
2015-11-11 Florent Kermarrecavoid forking migen, we will add custom modules in...
2015-11-07 Florent Kermarreclitex: reorganize things, first work working version
2015-11-07 Florent Kermarrecimport migen in litex/gen