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gen/sim, fhdl: remove port.we_granularity limitation on simulations
[litex.git]
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litex
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gen
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2016-03-23
Florent Kermarrec
gen/sim, fhdl: remove port.we_granularity limitation...
tree
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commitdiff
2016-03-21
Florent Kermarrec
gen: add missing sim files
tree
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commitdiff
2016-03-21
Florent Kermarrec
gen: remove vpi (no longer used)
tree
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commitdiff
2016-03-21
Florent Kermarrec
gen/build: merge with migen 0575c749e35a7180f0dca408e42...
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commitdiff
2016-02-11
Florent Kermarrec
gen/build: use verilog 2001-style synthesis attributes...
tree
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commitdiff
2015-12-02
Florent Kermarrec
gen/fhdl/verilog: add regular comb parameter to allow...
tree
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commitdiff
2015-11-30
Florent Kermarrec
gen/build: use name_override for all IOs defined in...
tree
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commitdiff
2015-11-16
Florent Kermarrec
build: remove edif support
tree
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commitdiff
2015-11-16
Florent Kermarrec
gen/fhdl/verilog: remove asic_syntax and expose reg_ini...
tree
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commitdiff
2015-11-14
Florent Kermarrec
add TODOs
tree
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commitdiff
2015-11-13
Florent Kermarrec
for now use our fork of migen (to be able to simulate...
tree
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commitdiff
2015-11-13
Florent Kermarrec
litex/gen: reintegrate migen with modifications to...
tree
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commitdiff
2015-11-11
Florent Kermarrec
avoid forking migen, we will add custom modules in...
tree
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commitdiff
2015-11-07
Florent Kermarrec
litex: reorganize things, first work working version
tree
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commitdiff
2015-11-07
Florent Kermarrec
import migen in litex/gen
tree
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commitdiff