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soc/cores/clock: add Max10PLL.
[litex.git]
/
litex
/
soc
/
cores
/
clock.py
2020-04-08
Florent Kermarrec
soc/cores/clock: add Max10PLL.
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2020-04-08
Florent Kermarrec
soc/cores/clock: add Cyclone10LPPLL.
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2020-04-08
Florent Kermarrec
soc/cores/clock/CycloneVPLL: fix typos.
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2020-04-08
Florent Kermarrec
soc/cores/clock: rename Altera to Intel.
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2020-04-07
Florent Kermarrec
soc/cores/clock: add CycloneVPLL.
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2020-04-07
Florent Kermarrec
soc/cores/clock: add initial AlteraClocking/CycloneIV...
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2020-04-06
Florent Kermarrec
soc/cores: use reset_less on datapath/configuration...
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2020-04-03
Florent Kermarrec
soc/cores/clock/ECP5PLL: add CLKI_DIV support.
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2020-03-25
enjoy-digital
Merge pull request #437 from feliks-montez/bugfix/fix...
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2020-03-24
Florent Kermarrec
cores/clock/ECP5PLL: add phase support.
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2020-03-19
enjoy-digital
Merge pull request #431 from antmicro/hybrid-mac
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2020-03-16
Florent Kermarrec
soc/cores/clock: make sure specific clkoutn_divide_rang...
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2020-03-13
enjoy-digital
Merge pull request #427 from enjoy-digital/s7mmcm_fract...
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2020-03-13
Florent Kermarrec
cores/clock: simplify Fractional Divide support on...
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2020-03-13
enjoy-digital
Merge pull request #421 from betrusted-io/clk0_fractional
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2020-03-13
Florent Kermarrec
test: add initial (minimal) test for clock abstraction...
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2020-03-11
Sean Cross
Merge pull request #422 from xobs/core-doc-fixes
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2020-03-10
Florent Kermarrec
cores/clock/USIDELAYCTRL: use separate reset/ready...
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2020-03-10
bunnie
add fractional division options to clk0 config on PLL
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2020-03-10
enjoy-digital
Merge pull request #419 from gsomlo/gls-ultra-sdram...
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2020-03-10
Florent Kermarrec
cores/clock: add logging to visualize clkin/clkouts...
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2020-03-09
Florent Kermarrec
soc/cores/clock/iCE40PLL: add SB_PLL40_PAD support.
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2020-02-24
enjoy-digital
Merge pull request #400 from Xiretza/ecp5-pll-freqfix
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2020-02-24
Xiretza
Fix ECP5PLL VCO frequency range
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2020-02-18
Florent Kermarrec
soc/cores/clock: add reset_cycles parameter to S7IDELAY...
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2020-02-08
enjoy-digital
Merge pull request #278 from scanakci/blackparrot_litex
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2020-01-24
enjoy-digital
Merge pull request #358 from antmicro/litex_sim_ddr
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2020-01-24
Florent Kermarrec
cores/clock/create_clkout: rename clk_ce to ce, improve...
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2020-01-24
enjoy-digital
Merge pull request #357 from betrusted-io/add_clk_ce
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2020-01-24
bunnie
add BUFIO to clockgen buffer options
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2020-01-24
bunnie
add option for BUFGCE to the clock generator buffer...
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2020-01-19
bunnie
cores/clock/xadc: ease DRP timings
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2020-01-09
enjoy-digital
Merge pull request #337 from gregdavill/spi-flash
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2020-01-06
enjoy-digital
Merge pull request #331 from betrusted-io/xadc_mods
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2020-01-01
Florent Kermarrec
soc/cores/clock: also allow margin=0 on iCE40PLL and...
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2020-01-01
enjoy-digital
Merge pull request #328 from betrusted-io/precise_clocks
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2020-01-01
bunnie
add the possibility for a "precise" clock solution
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2019-11-20
Florent Kermarrec
soc/cores/clock: change drp_locked to CSRStatus and...
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2019-11-20
Florent Kermarrec
soc/cores/clock: reset PLL/MMCM on all 7-series/Ultrasc...
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2019-11-20
enjoy-digital
Merge pull request #309 from antmicro/mmcm-fix
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2019-11-20
Pawel Czarnecki
soc/cores/clock: add lock reg and assign reset
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2019-10-01
enjoy-digital
Merge pull request #269 from antmicro/rework_icap
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2019-09-29
Florent Kermarrec
soc/cores/clocks: improve readibility
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2019-08-09
Florent Kermarrec
cores/clock/S7PLL: fix -1/-3 speedgrade vco max freq...
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2019-08-07
Florent Kermarrec
cores/clock: juse use 1e9/freq instead of period_ns
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2019-08-07
Florent Kermarrec
cores/clock/s6pll: add phase support
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2019-08-07
Florent Kermarrec
cores/clock/xilinx: change clkfbout_mult loop order...
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2019-07-23
Florent Kermarrec
cores/clock: cleanup
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2019-07-23
Florent Kermarrec
cores/clock: add initial iCE40 support
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2019-07-22
enjoy-digital
Merge pull request #216 from antmicro/booting_vexriscv_...
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2019-07-16
enjoy-digital
Merge pull request #219 from flammit/fix-ecp5-pll
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2019-07-14
Francis Lam
soc: cores: fix name of EHXPLLL output clock in ECP5PLL
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2019-06-23
Florent Kermarrec
add CONTRIBUTORS file and add copyright header to all...
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2019-04-23
Florent Kermarrec
cores/clock: add divclk_divide_range on S6PLL/S6DCM
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2019-04-23
Florent Kermarrec
cores/clock: use common XilinxClocking class for all...
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2019-04-23
Michael Betz
cores/clock: add initial Spartan6 PLL/DCM support
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2019-04-19
Sean Cross
Merge branch 'master' of https://github.com/enjoy-digit...
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2019-04-15
Florent Kermarrec
soc/cores/clock: add divclk_divide/vco_margin support...
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2019-04-15
Florent Kermarrec
soc/cores/clock: improve presentation
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2019-02-14
Florent Kermarrec
soc/cores/clock: add actual clk_freqs to config
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2019-01-22
Florent Kermarrec
soc/cores/clock: add USIDELAYCTRL
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2019-01-16
Florent Kermarrec
soc/cores/clock: allow ClockSignal to be used for clkin
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2019-01-08
Florent Kermarrec
soc/cores/clock: add Xilinx Ultrascale PLL/MMCM
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2018-12-28
Florent Kermarrec
soc/cores/clock/ECP5PLL: add basic phase support
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2018-12-20
Tim Ansell
Merge pull request #144 from mithro/nextpnr-migen-update
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2018-12-19
Florent Kermarrec
soc/cores/clock: remove return on S7PLL.create_clkout
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2018-11-27
enjoy-digital
Merge pull request #130 from jfng/master
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2018-11-27
Florent Kermarrec
cores/clock: test and fix ECP5PLL, phase still not...
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2018-11-26
enjoy-digital
Merge pull request #128 from mithro/small-fix
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2018-11-23
Florent Kermarrec
cores/clock: add ECP5PLL
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2018-11-13
Florent Kermarrec
cores/clock/S7: just reset the generated clock, not...
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2018-11-12
enjoy-digital
Merge pull request #125 from daveshah1/trellis_sdram
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2018-11-02
enjoy-digital
Merge pull request #122 from daveshah1/trellis_ulx3s
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2018-11-01
enjoy-digital
Merge pull request #123 from cr1901/prv32-min
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2018-10-31
Florent Kermarrec
cores/clock: add with_reset parameter (default to True)
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2018-10-28
enjoy-digital
Merge branch 'master' into xilinx+yosys
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2018-10-16
Florent Kermarrec
soc/cores/clock: add margin parameter to create_clkout...
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2018-09-28
Florent Kermarrec
soc/cores/clock: add expose_drp on S7PLL/S7MMCM
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2018-09-25
enjoy-digital
Merge pull request #109 from cr1901/xip-improve
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2018-09-25
Florent Kermarrec
soc/cores/clock: different clkin_freq_range for pll...
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2018-09-25
Florent Kermarrec
soc/cores/clock: different vco_freq_range for pll and...
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2018-09-25
Florent Kermarrec
soc/core/clock: allow selecting buffer type (None,...
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2018-09-24
Florent Kermarrec
soc/cores/clock: create specific S7IDELAYCTRL module
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2018-09-24
Florent Kermarrec
soc/cores/clock: add S7MMCM support
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2018-09-24
Florent Kermarrec
soc/cores/clocks/S7PLL: add speedgrade support, default...
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2018-09-24
Florent Kermarrec
soc/cores: init clock abstraction module
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