Allow using gcc for or1k.
[litex.git] / litex / soc / cores /
2017-02-01 Florent Kermarrecsoc/cores/flash/spi_flash: remove bitbanging comment...
2017-01-26 Florent Kermarrecadd SpiFlashSingle and rename SpiFlash to SpiFlashDualQuad
2017-01-17 enjoy-digitalMerge pull request #14 from mithro/spiflash2
2016-12-26 Sebastien Bourdeauducqspi_flash: fix bitbang with spi_width=1
2016-04-29 Florent Kermarrecmove sdram code to litedram (https://github.com/enjoy...
2016-04-21 Florent Kermarrecuse new Record.connect omit parameter (replace leave_out)
2016-04-19 enjoy-digitalMerge pull request #1 from mithro/master
2016-04-19 Florent Kermarrecsoc/cores: fix spi
2016-04-19 Florent KermarrecMerge branch 'master' of https://github.com/enjoy-digit...
2016-04-18 Florent Kermarrecsoc/cores/sdram/settings: simplify modules and fix...
2016-04-12 Florent KermarrecMerge branch 'master' of https://github.com/enjoy-digit...
2016-04-07 Florent Kermarrecbuild/sim: adapt verilator simulation to new stream...
2016-03-31 Florent Kermarrecinitial RISC-V support (with picorv32), still some...
2016-03-29 Florent Kermarrecsoc/cores/sdram/phy: fix S6QuarterRateDDRPHY
2016-03-16 Florent Kermarrecsoc/interconnect/stream: use valid/ready/last signals...
2016-03-16 Florent Kermarrecsoc: replace all Sink/Source with stream.Endpoint
2015-12-27 Florent Kermarrecsome cleanup
2015-11-16 Florent Kermarrecsoc/cores/uart remove software (will be re-written...
2015-11-14 Florent Kermarrecsoc/integration/cpu_interface: add bases, constants...
2015-11-14 Florent Kermarrecsoc/cores/uart: add UARTWishboneBridgeDriver software
2015-11-14 Florent Kermarrecsoc/cores: remove liteeth_mini and use liteeth
2015-11-13 Florent Kermarrecfor now use our fork of migen (to be able to simulate...
2015-11-11 Florent Kermarrecsoc/interconnect: add wishbonebridge and uart bridge
2015-11-11 Florent Kermarrecsoc/cores/liteeth_mini: add phy model for verilator...
2015-11-11 Florent Kermarrecsoc/cores: reintroduce liteeth_mini (until we switch...
2015-11-11 Florent Kermarrecavoid forking migen, we will add custom modules in...
2015-11-10 Florent Kermarrecsoc: merge with misoc 3fcc4f116c3292020cb811d179e45ae45...
2015-11-10 Florent Kermarrecboards/targets/sim: get SDRAM working in simulation...
2015-11-07 Florent Kermarreclitex: get verilator simulation working and add sim...
2015-11-07 Florent Kermarreclitex: reorganize things, first work working version