build/platforms: Add ice40_hx8k_b_evn from Migen.
[litex.git] / litex / soc /
2018-10-01 Florent Kermarrecbios/sdram: rewrite write_leveling (simplify and improv...
2018-09-28 Florent Kermarrecsoc/cores/clock: add expose_drp on S7PLL/S7MMCM
2018-09-25 enjoy-digitalMerge pull request #109 from cr1901/xip-improve
2018-09-25 Florent Kermarrecsoc/cores/clock: different clkin_freq_range for pll...
2018-09-25 Florent Kermarrecsoc/cores/clock: different vco_freq_range for pll and...
2018-09-25 Florent Kermarrecsoc/core/clock: allow selecting buffer type (None,...
2018-09-24 Florent Kermarrecsoc/cores/clock: create specific S7IDELAYCTRL module
2018-09-24 Florent Kermarrecsoc/cores/clock: add S7MMCM support
2018-09-24 Florent Kermarrecsoc/cores/clocks/S7PLL: add speedgrade support, default...
2018-09-24 Florent Kermarrecsoc/cores: init clock abstraction module
2018-09-24 William D. JonesDistinguish crt0 variants more clearly, update BIOS...
2018-09-24 William D. Jonesintegration/builder: Create EXECUTE_IN_PLACE Makefile...
2018-09-24 William D. Jonesintegration/builder: Add LiteX define to generated...
2018-09-24 Florent Kermarrecsoc_core: use cpu instead of cpu_or_bridge internally...
2018-09-24 Florent Kermarrecsoc_core/get_mem_data: add endianness support and use...
2018-09-24 Florent Kermarreccores/cpu: add software informations to cpu and simplif...
2018-09-24 Florent Kermarrecsoc_core: add uart-stub argument
2018-09-23 enjoy-digitalMerge pull request #108 from xobs/use-csr-accessors
2018-09-22 Sean Crosscsr: use external csr_readl()/csr_writel() if present
2018-09-22 Sean Crosscsr: use readl()/writel() accessors for accessing mmio
2018-09-22 Tim AnsellMerge pull request #106 from cr1901/data-crt0
2018-09-21 William D. Joneslibbase/crt0-lm32.S: Add provisions for loading .data...
2018-09-19 Florent Kermarrectargets/sim: add ram-init param to allow initializing...
2018-09-19 Florent Kermarrecintegration/soc_core: add get_mem_data function to...
2018-09-19 Florent Kermarrecsoc/intergration/builder: fix when no sdram
2018-09-18 enjoy-digitalMerge pull request #101 from cr1901/icestorm-migen...
2018-09-13 Florent Kermarrecbios/sdram: mode sdhw()
2018-09-13 Florent Kermarrecbios/sdram: add missing #ifdef
2018-09-13 Florent Kermarrecbios/sdram: show all read scans when failing.
2018-09-12 Florent Kermarreccpu/lm32: re-enable multiplier/divider in minimal varia...
2018-09-09 Florent Kermarrecsoc_sdram: update with litedram
2018-09-08 enjoy-digitalMerge pull request #99 from cr1901/mk-copy-main-ram
2018-09-08 William D. JonesAdd COPY_TO_MAIN_RAM generated Makefile variable to...
2018-09-08 enjoy-digitalMerge pull request #100 from cr1901/tinyprog-fix
2018-09-07 Florent Kermarrecsoc_sdram: revert vivado l2 cache workaround (still...
2018-09-07 Florent Kermarrectargets: pass endianness to LiteEThMAC, tftp working...
2018-09-06 Jean-François Nguyenlibnet/microudp: (WIP) fix endianness issues
2018-09-06 enjoy-digitalMerge pull request #98 from jfng/fix_typo
2018-09-06 Jean-François Nguyenfix typo and unused include
2018-09-06 Florent Kermarreccpu/minerva: add workaround on import until code is...
2018-09-05 Jean-François Nguyenadd Minerva support
2018-09-05 Florent Kermarreclitex_server: update pcie and remove bar_size parameter
2018-09-04 Tim AnsellMerge pull request #96 from cr1901/tinyfpga_bx
2018-09-04 Tim AnsellMerge pull request #95 from cr1901/lm32-lite
2018-09-03 William D. JonesAdd lm32 "lite" variant, remove mult/div from "minimal...
2018-08-23 Tim AnsellMerge pull request #91 from cr1901/ignore-fix
2018-08-23 Tim AnsellMerge pull request #92 from cr1901/l2-gate
2018-08-23 William D. Jonessoftware/bios: Gate flush_l2_cache() if L2 Cache isn...
2018-08-22 Florent Kermarrecbios/sdram: improve/simplify read window selection
2018-08-22 Florent Kermarrecbuilder: change call to get_sdram_phy_c_header and...
2018-08-22 Florent Kermarrecsoc_sdram: cosmetic
2018-08-22 Florent Kermarrecsoc_sdram: vivado is now able to implement the l2_cache...
2018-08-21 Florent Kermarrecsoc_core: add cpu_endianness
2018-08-21 Florent Kermarrecbuilder: get_sdram_phy_header renamed to get_sdram_phy_...
2018-08-21 Florent Kermarrecsoc_sdram: use new LiteDRAMWishbone2Native and port...
2018-08-21 Florent Kermarrecvexriscv: update
2018-08-20 Florent Kermarrecsoc/integration: move sdram_init to litedram
2018-08-18 Florent KermarrecVexriscv: update csr-defs.h
2018-08-18 Florent Kermarrecupdate Vexriscv
2018-08-18 Florent Kermarrecbios/sdram: changes to ease manual read window selection
2018-08-17 Florent Kermarreclitex_server: allow multiple clients to connect to...
2018-08-17 Florent Kermarreccpu/lm32: add minimal variant with no i/d cache, pipeli...
2018-08-16 Florent Kermarrecbios/boot: flush all caches before running from ram
2018-08-16 Florent Kermarreccpu_interace: use riscv64-unknown-elf if available...
2018-08-14 Florent Kermarrecbios/sdram: fix read_level_scan result
2018-08-12 enjoy-digitalMerge pull request #86 from pgielda/patch-1
2018-08-12 Peter GieldaFix generating csr.csv file
2018-08-08 Florent Kermarrecsoc/intergration/cpu_interface: typo
2018-08-07 Florent Kermarrecbios/main: use edata instead of erodata
2018-08-07 Florent Kermarrecpicorv32: add reset signal
2018-08-06 Florent Kermarrecsoc/software/bios: add reboot command
2018-08-06 Florent Kermarrecsoc/integration/soc_core: add Controller with reset...
2018-08-06 Florent Kermarrecsoc/interconnect/wishbone: add Timeout to avoid stallin...
2018-08-06 Florent Kermarrecsoc/cores/cpu: add reset signal
2018-07-27 enjoy-digitalMerge pull request #81 from xobs/vexriscv-to-wishbone
2018-07-27 Sean Crosstools: remove vexriscv_debug
2018-07-27 Sean Crossvexriscv: reset wishbone bus on CPU reset
2018-07-27 Sean Crossvexriscv: put debug bus directly on wishbone bus
2018-07-19 Florent Kermarrecbios/sdram: add ERR_DDRPH_BITSLIP constant and some...
2018-07-19 Florent Kermarrecsoc/integration/soc_sdram: add assertion on csr_data_wi...
2018-07-18 Florent Kermarrecsoftware/bios/linker: revert data section since require...
2018-07-17 enjoy-digitalMerge pull request #80 from xobs/fix-vexriscv-csr-read
2018-07-17 Sean Crossvexriscv_debug: use csr read()/write() accessors
2018-07-16 Florent Kermarrecsoc/integration/sdram_init: use fixed burst_length...
2018-07-16 Florent Kermarrecbios/sdram: improve bitslip selection when window can...
2018-07-10 Florent Kermarrecsoc/cores/uart: rename UARTMultiplexer to RS232PHYMulti...
2018-07-10 Florent Kermarrecsoc_core: add csr_expose parameter to be able to expose...
2018-07-06 Florent Kermarrecbios/sdram: improve read leveling (artix7 read-leveling...
2018-07-06 Florent Kermarrecbios/sdram: fix compilation with no write leveling
2018-07-06 enjoy-digitalMerge pull request #79 from xobs/fix-vexriscv-data...
2018-07-06 Sean Crossvexriscv: debug: fix reading DATA register
2018-07-06 enjoy-digitalMerge pull request #78 from xobs/vexriscv_debug_bridge
2018-07-06 Sean Crosssetup: add vexriscv_debug to list of entrypoints
2018-07-06 Sean Crosstools: vexriscv_debug: add debug bridge
2018-07-05 Florent Kermarreccores/cpu/vexriscv: create variants: None and "debug...
2018-07-05 Florent Kermarreccore/cpu/vexriscv/core: improve indentation
2018-07-05 enjoy-digitalMerge pull request #77 from xobs/debug-vexriscv-enjoy
2018-07-05 Sean Crosssoc_core: uart: add a reset line to the UART
2018-07-05 Sean Crosssoc: integration: use the new cpu_debugging flag for...
2018-07-05 Sean Crosssoc: vexriscv: add cpu debug support
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