fhdl/specials: MemoryPort.clock should always be a ClockSignal
[litex.git] / migen /
2015-09-19 Sebastien Bourdeauducqfhdl/specials: MemoryPort.clock should always be a...
2015-09-19 Sebastien Bourdeauducqfhdl/simplify: add MemoryToArray
2015-09-19 Sebastien Bourdeauducqtest/fifo: convert to new API
2015-09-19 Sebastien Bourdeauducqgenlib/fifo: add missing import
2015-09-19 Sebastien Bourdeauducqsim: support arrays, and cat+slice in assignment target
2015-09-19 Florent Kermarrecmigen/genlib/cdc: fix BusSynchronizer
2015-09-19 Sebastien Bourdeauducqsim: remove unneeded import
2015-09-19 Sebastien Bourdeauducqgenlib/CRG: fix variable name conflict
2015-09-18 Sebastien Bourdeauducqtest: add divider
2015-09-17 Sebastien Bourdeauducqsim: support Case
2015-09-17 Sebastien Bourdeauducqsim: variables are deprecated
2015-09-17 Sebastien Bourdeauducqsim: fix comb evaluation
2015-09-17 Sebastien Bourdeauducqtest/size: do not test removed functions
2015-09-17 Sebastien Bourdeauducqtest/coding: use new API
2015-09-17 Sebastien Bourdeauducqgenlib/misc: add missing import
2015-09-17 Sebastien Bourdeauducqfhdl/structure: all case statements should be lists
2015-09-17 Sebastien Bourdeauducqfhdl/bitcontainer: remove fiter
2015-09-17 Sebastien Bourdeauducqminor bugfixes
2015-09-17 Sebastien Bourdeauducqsim: support eval of slice, cat and mux
2015-09-17 Sebastien Bourdeauducqfhdl/structure: fix namespace pollution
2015-09-17 Sebastien Bourdeauducqtest: bit reverse
2015-09-17 Sebastien Bourdeauducqfhdl/bitcontainer: remove fslice and freversed
2015-09-17 Sebastien Bourdeauducqtest/constant: use new API
2015-09-17 Robert Jordensadd unittests for Constant
2015-09-17 Sebastien Bourdeauducqfhdl/verilog: fix case value sort
2015-09-15 Sebastien Bourdeauducqfhdl/structure: introduce Constant, autowrap for eq...
2015-09-12 Sebastien Bourdeauducqfhdl/decorators: remove traces of deprecated API
2015-09-12 Sebastien Bourdeauducqgenlib: remove reverse_bytes, FlipFlop, Counter
2015-09-12 Sebastien Bourdeauducqgenlib: cleanup CRG
2015-09-12 Sebastien Bourdeauducqfhdl/decorators: remove deprecated API
2015-09-12 Sebastien Bourdeauducqsimplify imports, migen.fhdl.std -> migen
2015-09-12 Sebastien Bourdeauducqbuild/xilinx: minor cleanup
2015-09-12 Sebastien Bourdeauducqtest/support,signed,sort: use new simulator
2015-09-12 Sebastien Bourdeauducqsim: refactor comb commit
2015-09-12 Sebastien Bourdeauducqsim: support eval of nested lists
2015-09-12 Sebastien Bourdeauducqgenlib/sort: remove unneeded import
2015-09-12 Sebastien Bourdeauducqtest/examples: do not attempt to run deleted examples
2015-09-12 Sebastien Bourdeauducqsim: support clock domains without sync
2015-09-11 Sebastien Bourdeauducqsimulator: support generators
2015-09-11 Sebastien Bourdeauducqnew simulator: basic execution
2015-09-11 Sebastien Bourdeauducqfhdl/tools: add input lister
2015-09-11 Sebastien Bourdeauducqstyle
2015-09-11 Sebastien Bourdeauducqfhdl: remove features new simulator won't use
2015-09-10 Sebastien Bourdeauducqremove genlib.misc.optree (use reduce instead)
2015-09-10 Yves Delleyfixed bug in value_bits_sign of mul operatiors
2015-09-10 Sebastien Bourdeauducqmibuild -> migen.build
2015-09-05 Sebastien BourdeauducqSimulator will be rewritten
2015-09-05 Sebastien BourdeauducqRemove code that will be into MiSoC or other packages.
2015-08-18 Florent Kermarrecmigen/actorlib/packet: fix source.error in Depacketizer
2015-08-09 Florent Kermarrecmigen/flow/actor: fix sop/eop validation in PipelinedAc...
2015-07-27 Sebastien Bourdeauducqresetless -> reset_less
2015-07-26 Sebastien Bourdeauducqfhdl: allow use of ResetSignal() on resetless clock...
2015-07-24 Sebastien BourdeauducqRevert "migen/actorlib/fifo: add FIFO wrapper function"
2015-07-24 Florent Kermarrecmigen/actorlib/fifo: add FIFO wrapper function
2015-07-24 Florent Kermarrecmigen/fhdl/tools: fix rename_clock_domain when new...
2015-07-22 Florent KermarrecMerge branch 'master' of https://github.com/m-labs...
2015-07-22 Florent Kermarrecactorlib/packet/Depacketizer: manage layouts without...
2015-06-24 Sébastien BourdeauducqMerge pull request #21 from psmears/patch-1
2015-06-23 Florent Kermarrecfhdl/specials: add Keep SynthesisDirective
2015-06-19 Florent Kermarrecbus/wishbone: remove size CSR from Cache (L2 size will...
2015-06-17 Florent Kermarrecwishbone: add Cache (from WB2LASMI)
2015-06-02 Florent Kermarrecmigen/bus/wishbone: add UpConverter and Converter wrapp...
2015-06-02 Florent Kermarrecmigen/genlib/fsm: fix delayed_enter when delay is negat...
2015-06-02 Sebastien Bourdeauducqgenlib/cdc: add BusSynchronizer
2015-05-23 Florent Kermarrecfhdl/verilog: add reserved keywords
2015-05-23 Florent Kermarrecmigen/genlib/record: add leave_out parameter to connect
2015-05-13 Florent Kermarrecmigen/actorlib/spi: apply missing CSR renaming
2015-05-13 Florent Kermarrecvpi: cleanup (thanks sb)
2015-05-13 Florent Kermarrecvpi: fix and simplify windows simulation (ends of msg...
2015-05-12 Florent KermarrecMerge branch 'master' of https://github.com/m-labs...
2015-05-12 Florent Kermarrecmigen/genlib/misc: replace Timeout with WaitTimer from...
2015-05-09 William D. JonesWindows simulation support
2015-04-30 Alain Péteutadd examples tests
2015-04-28 Florent Kermarrecmigen/actorlib/packet: add Packetizer and Depacketizer
2015-04-27 Florent Kermarrecmigen/genlib: avoid use of floating point in reverse_bytes
2015-04-27 Florent Kermarrecmigen/actorlib: add packet.py to manage dataflow packet...
2015-04-27 Florent Kermarrecmigen/actorlib/misc: add BufferizeEndpoints
2015-04-27 Florent Kermarrecmigen/genlib/misc: add reverse_bytes
2015-04-24 Florent Kermarrecmigen/test: for now desactivate test_generic_syntax...
2015-04-24 Florent Kermarrecmigen/fhdl/verilog: _printheader/_printcomb, remove...
2015-04-24 Florent Kermarrecmigen/fhdl: give explicit names to syntax specializatio...
2015-04-24 Florent Kermarrecmigen/test: rename asic_syntax to test_syntax and simplify
2015-04-22 Guy Hutchisontest: add test for asic_syntax
2015-04-21 Guy Hutchisonfhdl/verilog: add flag to produce ASIC-friendly output
2015-04-13 Florent Kermarrecrevert fhdl/verilog: avoid reg initialization in printh...
2015-04-13 Florent Kermarrecglobal: more pep8
2015-04-13 Florent Kermarrecglobal: pep8 (E261, E271)
2015-04-13 Florent Kermarrecglobal: pep8 (E225)
2015-04-13 Florent Kermarrecglobal: pep8 (E231)
2015-04-13 Florent Kermarrecglobal: pep8 (E302)
2015-04-13 Florent Kermarrecglobal: pep8 (replace tabs with spaces)
2015-04-13 Florent KermarrecMerge branch 'master' of https://github.com/m-labs...
2015-04-12 Sebastien Bourdeauducqsim: fix to support ConvOutput
2015-04-10 Florent Kermarrecfhdl/verilog: avoid reg initialization in printheader...
2015-04-09 Sebastien Bourdeauducqforgot other cordic files
2015-04-08 Sebastien Bourdeauducqintroduce conversion output object (prevents file IO...
2015-04-08 Sebastien Bourdeauducqgenlib: remove cordic (will live in pdq2)
2015-04-05 Robert Jordensdecorators: remove deprecated semantics
2015-04-05 Robert Jordensdecorators: fix stacklevel, export in std
2015-04-05 Robert Jordensdecorators: fix ControlInserter
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