Added English Language description for stdu instruction
[openpower-isa.git] / openpower / isatables /
2022-09-09 Luke Kenneth Casso... "D" of fishmv RT,D has to be done as a custom field
2022-09-09 Dmitry Selyutinfields.text: this fish ain't moving
2022-09-09 Dmitry Selyutinminor_22: make svshape2 really shaped
2022-09-09 Dmitry Selyutinminor_31: fix setb form
2022-09-09 Dmitry Selyutinminor_30: fix rldicl form
2022-09-09 Luke Kenneth Casso... added missing RA RB RT to TLI-Form fields.txt
2022-09-09 Dmitry Selyutinmajor: fix andi./andis. form
2022-09-09 Dmitry Selyutinminor_30: fix rldcl/rldcr forms
2022-09-08 Luke Kenneth Casso... rename svshape and svoffset fields
2022-09-08 Dmitry Selyutinsvshape2: rename fields
2022-09-06 Luke Kenneth Casso... REMAP parallel-reduce:
2022-09-06 Jacob Lifshayfix incorrect comment
2022-09-06 Jacob Lifshayadd all fptrans ops to CSVs
2022-09-06 Jacob Lifshayadd unofficial and comment2 fields to minor_63.csv
2022-09-06 Luke Kenneth Casso... removing two unused fields (E) which somehow
2022-09-04 Luke Kenneth Casso... brainmelt moment, added a comma into a comment in a...
2022-09-04 Luke Kenneth Casso... comments for 3-in 2-out ops
2022-09-04 Jacob Lifshayreallocate opcodes for ffadds (converted to X-FORM...
2022-09-03 Luke Kenneth Casso... Revert "add inv option to svshape2 (only 1 bit)"
2022-09-03 Luke Kenneth Casso... add inv option to svshape2 (only 1 bit)
2022-09-03 Luke Kenneth Casso... update sv_analysis to create separate SVMode.LDST_IDX...
2022-09-02 Luke Kenneth Casso... add test_caller_svshape2.py and make corrections to...
2022-09-02 Luke Kenneth Casso... whoops bit 25 is sk not vf in svshape2. matches with...
2022-09-02 Luke Kenneth Casso... add svshape2 (stub pseudocode) fields, Form, and CSV...
2022-09-02 Luke Kenneth Casso... add explicit 13 patterns for svshape which make a hole...
2022-09-01 Luke Kenneth Casso... missed rlwm* in conversion to RC_ONLY
2022-09-01 Luke Kenneth Casso... update CSV files marking those instructions that are...
2022-08-24 Luke Kenneth Casso... duplicate RM CSV entries gone after re-run of sv_analys...
2022-08-24 Luke Kenneth Casso... hmm tdi/twi are kinda valid as svp64 prefixable
2022-08-18 Luke Kenneth Casso... use bitpattern in minor_30.csv to give a single match for
2022-08-14 Dmitry Selyutinisatables: introduce instruction database CSV
2022-08-13 Luke Kenneth Casso... whoops re-added accidentally-deleted CSV file
2022-08-13 Luke Kenneth Casso... remove Pack-Unpack csv files
2022-08-13 Luke Kenneth Casso... remove Pack/Unpack flag entirely from sv_analysis
2022-08-12 Luke Kenneth Casso... remove LDSTBREV condition, used for ld-st-with-shift
2022-08-05 Luke Kenneth Casso... re-run svanalysis fix fishmv no TODO
2022-08-03 Luke Kenneth Casso... completely bungled multi-EXTRA specs
2022-08-03 Luke Kenneth Casso... WHOOPS. set the pack column in CSV files unconditionall...
2022-07-30 Luke Kenneth Casso... add LDST-2P-*PU.csv, tracked down weirdness, it was the
2022-07-30 Luke Kenneth Casso... addPack/Unpack to sv_analysis, extra CSV column.
2022-07-28 Luke Kenneth Casso... much dumbness. fmvis is RM-1P-1D
2022-07-28 Luke Kenneth Casso... Revert "add fmvis as a new RM-1P-1S SVP64 RM type"
2022-07-28 Luke Kenneth Casso... add fmvis as a new RM-1P-1S SVP64 RM type
2022-07-27 Jacob Lifshayadd another test and fix broken fishmv pseudocode
2022-07-27 Konstantinos Marga... Add fishmv instruction (bug #887)
2022-07-26 Luke Kenneth Casso... off-by-one in declaration of pattern-match XO for fmvis
2022-07-26 Luke Kenneth Casso... add example fmvis instruction to trans/svp64.py
2022-07-26 Luke Kenneth Casso... dang.
2022-07-26 Luke Kenneth Casso... Revert "set IN1 to NONE for fmvis", in1 is FRS.
2022-07-26 Konstantinos Marga... set IN1 to NONE for fmvis
2022-07-26 Konstantinos Marga... Add fmvis instruction + tests, bug #887
2022-07-12 Luke Kenneth Casso... add DX-Form FRS for fmvis
2022-07-11 Andrey MiroshnikovMissed another two form sub-headings
2022-07-11 Andrey MiroshnikovMissed another two form sub-headings
2022-07-11 Andrey MiroshnikovFixed missing space for form headings
2022-07-10 Luke Kenneth Casso... fix svindex pseudocode
2022-07-06 Luke Kenneth Casso... move DX Form
2022-07-06 Luke Kenneth Casso... add svindex to power_enums.py, minor_22.csv
2022-07-06 Luke Kenneth Casso... indentation on fields.txt to make it more markdown...
2022-06-26 Luke Kenneth Casso... rename SVRM *field* to SVrm to avoid a name-clash with
2022-06-24 Luke Kenneth Casso... rename mask field to rmm to avoid using "mask" in binutils
2022-06-24 Luke Kenneth Casso... add SVd to fields.txt (SVI-Form)
2022-06-24 Luke Kenneth Casso... bmask does not have Rc=1 variant
2022-06-24 Luke Kenneth Casso... add to fields.txt for the svstep instruction
2022-06-24 Luke Kenneth Casso... add svindex SVI-Form to fields.txt
2022-06-24 Jacob Lifshayadd missed generated csv changes
2022-06-23 Luke Kenneth Casso... add BM2-Form to power_enums.py
2022-06-23 Andrey MiroshnikovAdded bmask, pywriter failing
2022-06-23 Luke Kenneth Casso... add SPDX-License-Headers to CSV files
2022-06-23 Luke Kenneth Casso... add explanatory comments on minor_22.csv
2022-06-23 Luke Kenneth Casso... add comment-stripping to get_csv()
2022-06-22 Luke Kenneth Casso... add BM2 Form for (DRAFT) bmask instruction
2022-06-22 Andrey MiroshnikovAdded entries for cprop, not sure if correct
2022-06-20 Luke Kenneth Casso... add absolute-signed-diff next to absolute-unsigned...
2022-06-20 Luke Kenneth Casso... rename absadd[us] to absdac[ud]
2022-06-19 Luke Kenneth Casso... add absadds - signed accumulating add. DRAFT
2022-06-19 Luke Kenneth Casso... add absadd (unsigned) DRAFT
2022-06-19 Luke Kenneth Casso... add absolute-difference DRAFT
2022-06-19 Luke Kenneth Casso... add average-add DRAFT pseudocode and CSV
2022-06-19 Luke Kenneth Casso... add the rest of min/max DRAFT av opcodes
2022-06-19 Luke Kenneth Casso... add maxs DRAFT instruction
2022-06-19 Luke Kenneth Casso... extend minor_22.csv bitsel pattern to cover bits 21..31
2022-06-17 Luke Kenneth Casso... add KAIVB SPR 850
2022-05-20 Luke Kenneth Casso... bit of a mess being sorted out
2022-05-19 Dmitry Selyutintemporarily revert opcode changes
2022-05-19 Dmitry Selyutinisatables/minor_22.csv: reflect a new XO bit
2022-05-18 Luke Kenneth Casso... add BM-Form and CRB-Form for bitmanip
2022-05-16 Luke Kenneth Casso... add to VA-Form, alter XO on SVM and SVRM Form
2022-05-16 Luke Kenneth Casso... add VA2-Form for Bitmanip ops [DRAFT]
2022-05-15 Luke Kenneth Casso... add L field to TLI-Form for grwvlut
2022-05-03 Jacob Lifshayadd Rc to ternlogi
2022-05-02 Luke Kenneth Casso... re-run sv_analysis to add mode field to csvs
2022-01-18 Jacob Lifshaygrev[w][i][.] pseudo-code works
2022-01-06 Jacob Lifshayadd grev[w][i] instructions
2022-01-06 Luke Kenneth Casso... add tlbsync and wait as NOPs
2022-01-05 Luke Kenneth Casso... add eieio instruction as a NOP to minor 31 csv
2021-12-10 Jacob Lifshaychange ternlogi to not have Rc field
2021-12-10 Jacob Lifshayadd .gitignore to ignore the generated vhdl
2021-12-02 Jacob Lifshaymove ternlogi to SHIFT_ROT unit
2021-11-17 Jacob Lifshayrename ternary->ternlog and associated form/field TI...
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