svp64.py: align indentation
[openpower-isa.git] / openpower /
2021-09-03 Dmitry Selyutinfixedstore: switch stbux to XLEN
2021-09-03 Dmitry Selyutinfixedstore: switch stbu to XLEN
2021-09-03 Dmitry Selyutinfixedstore: switch stbx to XLEN
2021-09-03 Dmitry Selyutinfixedstore: switch stb to XLEN
2021-09-03 Luke Kenneth Casso... use brackets round (XLEN/2) in divw pseudocode
2021-09-01 Luke Kenneth Casso... off-by-one in srad, same as sld and srd: XLEN-6:XLEN...
2021-09-01 Dmitry Selyutinfixedshift: switch sradX to XLEN
2021-09-01 Luke Kenneth Casso... off-by-one in sld and srd, XLEN-6:XLEN-1 not XLEN-5...
2021-09-01 Dmitry Selyutinfixedshift: switch srdX to XLEN
2021-09-01 Dmitry Selyutinfixedshift: switch sldX to XLEN
2021-09-01 Dmitry Selyutinfixedshift: switch srawX to XLEN
2021-09-01 Dmitry Selyutinfixedshift: switch srwX to XLEN
2021-09-01 Dmitry Selyutinfixedshift: switch slwX to XLEN
2021-09-01 Dmitry Selyutinfixedshift: switch rldcrX to XLEN
2021-09-01 Dmitry Selyutinfixedshift: switch rldclX to XLEN
2021-09-01 Dmitry Selyutinfixedshift: switch rlwnmX to XLEN
2021-08-31 Dmitry Selyutinfixedshift: switch extswsliX to XLEN
2021-08-31 Dmitry Selyutinfixedshift: switch sradiX to XLEN
2021-08-31 Dmitry Selyutinfixedshift: switch srawiX to XLEN
2021-08-31 Dmitry Selyutinfixedshift: switch rldiclX to XLEN
2021-08-31 Dmitry Selyutinfixedshift: switch rlwimiX to XLEN
2021-08-31 Dmitry Selyutinfixedshift: switch rlwinmX to XLEN
2021-08-31 Dmitry Selyutinfixedarith: switch divwX to XLEN
2021-08-31 Dmitry Selyutinfixedarith: switch divweX to XLEN
2021-08-31 Dmitry Selyutinfixedarith: switch divweuX to XLEN
2021-08-31 Dmitry Selyutinfixedarith: switch divdX to XLEN
2021-08-31 Dmitry Selyutinfixedarith: switch divdeX to XLEN
2021-08-31 Dmitry Selyutinfixedarith: switch modsd to XLEN
2021-08-31 Dmitry Selyutinfixedarith: switch modsw to XLEN
2021-08-31 Luke Kenneth Casso... adjusted popcntw to simplify by using temp vars
2021-08-31 Dmitry Selyutinfixedload: switch lbz to XLEN
2021-08-31 Dmitry Selyutinfixedload: switch lbzx to XLEN
2021-08-31 Dmitry Selyutinfixedload: switch lbzu to XLEN
2021-08-31 Dmitry Selyutinfixedload: switch lbzux to XLEN
2021-08-31 Dmitry Selyutinfixedload: switch lhz to XLEN
2021-08-31 Dmitry Selyutinfixedload: switch lhzx to XLEN
2021-08-31 Dmitry Selyutinfixedload: switch lhzu to XLEN
2021-08-31 Dmitry Selyutinfixedload: switch lhzux to XLEN
2021-08-31 Dmitry Selyutinfixedlogical: switch cnttzd to XLEN
2021-08-30 Dmitry Selyutinfixedlogical: bpermd fixup
2021-08-30 Dmitry Selyutinfixedlogical: switch popcntw to XLEN
2021-08-30 Dmitry Selyutinfixedarith: switch modud to XLEN
2021-08-30 Dmitry Selyutinfixedarith: switch divdeuX to XLEN
2021-08-30 Dmitry Selyutinfixedarith: switch moduw to XLEN
2021-08-30 Dmitry Selyutinfixedarith: switch divwuX to XLEN
2021-08-30 Dmitry Selyutinfixedarith: switch divduX to XLEN
2021-08-30 Dmitry Selyutinfixedarith: switch maddhd to XLEN
2021-08-30 Dmitry Selyutinfixedarith: switch maddld to XLEN
2021-08-30 Dmitry Selyutinfixedarith: switch maddhdu to XLEN
2021-08-30 Dmitry Selyutinfixedarith: switch mulli to XLEN
2021-08-30 Dmitry Selyutinfixedarith: switch mulhdu to XLEN
2021-08-30 Dmitry Selyutinfixedarith: switch mulhd to XLEN
2021-08-30 Dmitry Selyutinfixedarith: switch mulldX to XLEN
2021-08-30 Dmitry Selyutinfixedarith: switch mulhwu to XLEN
2021-08-30 Dmitry Selyutinfixedarith: switch mullwX to XLEN
2021-08-30 Dmitry Selyutinfixedarith: switch mulhw to XLEN
2021-08-30 Dmitry Selyutinfixedlogical: switch bpermd to XLEN
2021-08-30 Dmitry Selyutinfixedlogical: switch cntlzd to XLEN
2021-08-30 Dmitry Selyutinfixedlogical: switch popcntd to XLEN
2021-08-30 Dmitry Selyutinfixedlogical: switch extsw to XLEN
2021-08-30 Dmitry Selyutinfixedlogical: switch prtyw to XLEN
2021-08-30 Dmitry Selyutinfixedlogical: switch prtyd to XLEN
2021-08-30 Dmitry Selyutinfixedlogical: switch popcntb to XLEN
2021-08-30 Dmitry Selyutinfixedlogical: switch cmpb to XLEN
2021-08-30 Dmitry Selyutinfixedlogical: switch cntlzwX to XLEN
2021-08-30 Dmitry Selyutinfixedlogical: switch xori to XLEN
2021-08-30 Dmitry Selyutinfixedlogical: switch xoris to XLEN
2021-08-30 Dmitry Selyutinfixedlogical: switch oris to XLEN
2021-08-30 Dmitry Selyutinfixedlogical: switch andis. to XLEN
2021-08-30 Dmitry Selyutinfixedlogical: switch ori to XLEN
2021-08-30 Dmitry Selyutinfixedlogical: switch andi. to XLEN
2021-08-15 Luke Kenneth Casso... sv.bc test jumping to wrong location (offset 0xc not...
2021-08-14 Luke Kenneth Casso... end loop condition in svp64 bc pseudo-code
2021-08-11 Luke Kenneth Casso... corrections to SVP64 Branch Conditional
2021-08-08 Luke Kenneth Casso... add bc and bclr to sv_analysis
2021-08-07 Luke Kenneth Casso... remove SVP64 Branch format modifications (achieve a...
2021-08-05 Luke Kenneth Casso... add SVP64 Branch-Conditional equivalent of Rc fields
2021-08-02 Luke Kenneth Casso... add inverse DCT in-place unit test with bit-reversed...
2021-08-01 Luke Kenneth Casso... bit of a big update, remove all bit-reversed LD operati...
2021-08-01 Luke Kenneth Casso... add BCD operations to SVP64
2021-08-01 Luke Kenneth Casso... rename lw*br to lw*sh
2021-08-01 Luke Kenneth Casso... add LD-half-swap for i-DCT which does not work. redesig...
2021-07-31 Dmitry Selyutinisa/bcd: DPD_TO_BCD helper
2021-07-31 Dmitry Selyutinisa/bcd: BCD_TO_DPD helper
2021-07-31 Luke Kenneth Casso... replace DOUBLE function from helpers.py with pseudocode...
2021-07-31 Luke Kenneth Casso... add SINGLE function to double2single, to replace manual...
2021-07-31 Luke Kenneth Casso... add outer-inner RADIX2 iDCT unit test.
2021-07-31 Dmitry Selyutinisa/bcd.mdwn: fix incorrect declaration
2021-07-31 Luke Kenneth Casso... add SVP64 i-DCT unit test for inner butterfly, coeffici...
2021-07-31 Luke Kenneth Casso... add i-DCT SVP64 unit test for outer butterfly
2021-07-31 Luke Kenneth Casso... add iDCT modes to interim svshape instruction pseudo...
2021-07-30 Dmitry Selyutinisa/bcd.mdwn: fix assignment operator
2021-07-30 Dmitry Selyutinisa/bcd.mdwn: update addg6s pseudocode
2021-07-30 Dmitry Selyutinisatables: cbcdtd instruction
2021-07-30 Dmitry Selyutinisatables: cdtbcd instruction
2021-07-28 Luke Kenneth Casso... argh, have LD-bitreverse select the offset from RA...
2021-07-28 Luke Kenneth Casso... add mode for half-swap, to be combined with LD-bit...
2021-07-27 Luke Kenneth Casso... get DCT shortened table operational
2021-07-27 Dmitry Selyutinisatables: addg6s instruction
2021-07-27 Luke Kenneth Casso... adding reduced COS table DCT test
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