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misc: Merge branch v20.1.0.3 hotfix into develop
[gem5.git] / src / arch / arm / isa.cc
2021-02-03 Bobby R. Brucemisc: Merge branch v20.1.0.3 hotfix into develop blob | commitdiff | raw
2021-02-02 Adrian Herreraarch-arm: don't expose FEAT_VHE by default blob | commitdiff | raw | diff to current
2020-11-26 Curtis Dunhamarch-arm: Add ID_MMFR4{,EL1} system registers blob | commitdiff | raw | diff to current
2020-11-26 Bobby R. BruceMerge "misc: Merge branch hotfix v20.1.0.2 branch into... blob | commitdiff | raw | diff to current
2020-11-25 Ciro Santilliarch-arm: implement the aarch64 ID_ISAR6_EL1 miscregister blob | commitdiff | raw | diff to current
2020-11-23 Ciro Santilliarch-arm: serialize miscregs as a map blob | commitdiff | raw | diff to current
2020-11-16 Bobby R. Brucemisc: Merge branch hotfix v20.1.0.2 branch into develop blob | commitdiff | raw | diff to current
2020-11-16 Ciro Santilliarch-arm: move serialize and unserialize definition... blob | commitdiff | raw | diff to current
2020-11-03 Giacomo Travagliniarch-arm: Fix implementation of TLBI_VMALL instructions blob | commitdiff | raw | diff to current
2020-11-03 Giacomo Travagliniarch-arm: Add el2Enabled cached variable blob | commitdiff | raw | diff to current
2020-10-30 Gabe Blackmisc: Delete the now unnecessary create methods. blob | commitdiff | raw | diff to current
2020-10-23 Giacomo Travagliniarch-arm: Fix implementation of TLBI ALLEx instructions blob | commitdiff | raw | diff to current
2020-10-21 Giacomo Travagliniarch-arm: Replace any getDTBPtr/getITBPtr usage blob | commitdiff | raw | diff to current
2020-10-14 Gabe Blackmisc: Standardize the way create() constructs SimObjects. blob | commitdiff | raw | diff to current
2020-10-01 Bobby R. Brucemisc: Merge branch 'release-staging-v20.1.0.0' into... blob | commitdiff | raw | diff to current
2020-09-29 Timothy Hayesarch-arm: Instantiate a single HTM checkpoint at ISA... blob | commitdiff | raw | diff to current
2020-09-25 Bobby R. Brucemisc: Merge branch 'release-staging-v20.1.0.0' into... blob | commitdiff | raw | diff to current
2020-09-22 Giacomo Travagliniarch-arm: TLBI ALLE2IS should broadcast to the IS domain blob | commitdiff | raw | diff to current
2020-09-10 Shivani Parekhmisc: Replaced master/slave terminology blob | commitdiff | raw | diff to current
2020-09-08 Timothy Hayesarch-arm: Transactional Memory Extension (TME) blob | commitdiff | raw | diff to current
2020-08-28 Giacomo Travagliniarch-arm: Fix coding style in addressTranslation methods blob | commitdiff | raw | diff to current
2020-08-26 Giacomo Travagliniarch-arm: Rewrite addressTranslation to use BitUnions blob | commitdiff | raw | diff to current
2020-08-26 Giacomo Travagliniarch-arm: Remove deadcode from AArch64 address translation blob | commitdiff | raw | diff to current
2020-08-26 Giacomo Travagliniarch-arm: Refactor Address Translation (AT) code blob | commitdiff | raw | diff to current
2020-07-31 Jordi Vaqueroarch-arm: Implementing SecureEL2 feature for Armv8 blob | commitdiff | raw | diff to current
2020-07-27 Jordi Vaqueroarch-arm: Implement ARM8.1-VHE feature blob | commitdiff | raw | diff to current
2020-07-04 Bobby R. Brucemisc: Merged m5ops_base hotfix into develop blob | commitdiff | raw | diff to current
2020-07-02 Jordi Vaqueroarch-arm: Implementation of SelfHosted Debug Software... blob | commitdiff | raw | diff to current
2020-06-29 Jordi Vaqueroarch-arm: Implementation of ARMv8 SelfDebug Watchpoints blob | commitdiff | raw | diff to current
2020-06-25 Giacomo Travagliniarch-arm: Fix arm switcheroo regressions blob | commitdiff | raw | diff to current
2020-06-22 Jordi Vaqueroarch-arm: Implementation of Hardware Breakpoint exception blob | commitdiff | raw | diff to current
2020-06-12 Gabe Blackarch,cpu: Add a setThreadContext method to the ISA... blob | commitdiff | raw | diff to current
2020-06-09 Gabe Blackarch,cpu,dev,sim,mem: Collect System thread elements... blob | commitdiff | raw | diff to current
2020-06-08 Bobby R. Brucemisc: Merge hotfix v20.0.0.2 into develop blob | commitdiff | raw | diff to current
2020-06-02 Bobby R. Brucemisc: Merge branch version update into develop blob | commitdiff | raw | diff to current
2020-06-02 Bobby R. Brucemisc: Merge in 'hotfix-m5-tick-rounding-error' blob | commitdiff | raw | diff to current
2020-05-28 Bobby R. BruceMerge branch 'release-staging-v20.0.0.0' into develop blob | commitdiff | raw | diff to current
2020-05-28 Bobby R. Brucemisc: Merge branch 'release-staging-v20.0.0.0' into... blob | commitdiff | raw | diff to current
2020-05-05 Ciro Santilliarch-arm: show names on --debug-flags MiscRegs write: blob | commitdiff | raw | diff to current
2020-04-15 Giacomo Travagliniarch-arm: Override ISA::takeOverFrom for the Arm ISA blob | commitdiff | raw | diff to current
2020-04-15 Giacomo Travagliniarch-arm: Remove unnecessary haveGICv3CPUInterface blob | commitdiff | raw | diff to current
2020-03-12 Gabe Blackarm: Eliminate the MustBeOne ARM specific request flag. blob | commitdiff | raw | diff to current
2020-03-10 Adrian Herreraarch-arm: GenericTimer arch regs, perms/trapping blob | commitdiff | raw | diff to current
2020-03-07 Gabe Blackarch,cpu,gpu-compute,mem: Remove asid from Request... blob | commitdiff | raw | diff to current
2020-02-26 Bobby R. Brucemisc: merge branch 'release-staging-v19.0.0.0' into... blob | commitdiff | raw | diff to current
2020-02-24 Bobby R. Brucemisc: Merged release-staging-v19.0.0.0 into develop blob | commitdiff | raw | diff to current
2020-02-19 Adrian Herreraarch-arm: ArmISA::clear, inval TLB cached miscregs blob | commitdiff | raw | diff to current
2020-02-18 Gabe Blackarm: Delete authors lists from the arm files. blob | commitdiff | raw | diff to current
2020-02-13 Gabe Blackarm: "Correct" the spelling of flavor. blob | commitdiff | raw | diff to current
2020-02-05 Gabe Blackarch: Introduce a base class for ISA classes. blob | commitdiff | raw | diff to current
2020-02-04 Adrian Herreraarch-arm: reg access permissions highest EL helper blob | commitdiff | raw | diff to current
2019-11-25 Adrian Herreraarch-arm: default MIDR for Armv8 ISA processors blob | commitdiff | raw | diff to current
2019-11-18 Adrian Herreraarch-arm: R/W interface to AArch32 HCR2 misc reg blob | commitdiff | raw | diff to current
2019-10-19 Gabe Blackarch: Make a base class for Interrupts. blob | commitdiff | raw | diff to current
2019-09-19 Giacomo Travagliniarch-arm: PSTATE.PAN changes should inval cached regs... blob | commitdiff | raw | diff to current
2019-09-06 Giacomo Travagliniarch-arm: Fix read/setMiscReg for AArch32 GICv3 ICC... blob | commitdiff | raw | diff to current
2019-08-07 Jordi Vaqueroarch-arm: adding register control flags enabling LSE... blob | commitdiff | raw | diff to current
2019-08-05 Giacomo Travagliniarch-arm: Implement ARMv8.1-PAN, Privileged access... blob | commitdiff | raw | diff to current
2019-05-23 Giacomo Travagliniarch-arm: Expose haveGicv3CPUInterface to the ISA interface blob | commitdiff | raw | diff to current
2019-04-25 Giacomo Travagliniarch-arm: Remove un-needed hyp flag in TLBI operations blob | commitdiff | raw | diff to current
2019-04-25 Giacomo Travagliniarch-arm: Correct target EL field in TLBI operations blob | commitdiff | raw | diff to current
2019-04-02 Giacomo Travaglinidev-arm: Make GICv3 maintenance interrupt an ArmInterrupt blob | commitdiff | raw | diff to current
2019-03-14 Giacomo Gabrielliarch-arm,cpu: Add initial support for Arm SVE blob | commitdiff | raw | diff to current
2019-02-18 Giacomo Travagliniarch-arm: Move GICv3 detection at startup time blob | commitdiff | raw | diff to current
2019-01-25 Giacomo Travagliniarch-arm: Inital vector rename mode depending on A32/A64 blob | commitdiff | raw | diff to current
2019-01-22 Gabe Blackarch: cpu: Stop passing around misc registers by reference. blob | commitdiff | raw | diff to current
2019-01-22 Gabe Blackarm: Get rid of some register type definitions. blob | commitdiff | raw | diff to current
2019-01-16 Giacomo Travagliniarch-arm: Read VMPIDR instead of MPIDR when EL2 is... blob | commitdiff | raw | diff to current
2019-01-16 Anouk Van Laerarch-arm: Added TLBI_ALL EL2 instruction blob | commitdiff | raw | diff to current
2019-01-10 Jairo Balartdev-arm: Add a GICv3 model blob | commitdiff | raw | diff to current
2019-01-03 Curtis Dunhamarm: properly handle RES0/1 for SCTLRs blob | commitdiff | raw | diff to current
2018-12-19 Giacomo Travagliniarch-arm: Add Crypto in SE mode blob | commitdiff | raw | diff to current
2018-11-14 Giacomo Travagliniarch-arm: Print register name when warning on AT instru... blob | commitdiff | raw | diff to current
2018-11-07 Giacomo Travagliniarch-arm: ArmSystem::resetAddr64 renamed to be used... blob | commitdiff | raw | diff to current
2018-11-07 Giacomo Travagliniarch-arm: Refactor ISA::clear by adding a ISA::clear32... blob | commitdiff | raw | diff to current
2018-10-09 Giacomo Travagliniarch-arm: Add have_crypto System parameter blob | commitdiff | raw | diff to current
2018-10-01 Giacomo Travagliniarch-arm: Implement AArch64 ID_AA64MMFR2_EL1 register blob | commitdiff | raw | diff to current
2018-10-01 Giacomo Travagliniarch-arm: Init AArch64 ID registers in SE mode blob | commitdiff | raw | diff to current
2018-09-10 Andreas Sandbergarm: Add support for tracking TCs in ISA devices blob | commitdiff | raw | diff to current
2018-07-16 Giacomo Travagliniarch-arm: Introduce ARMv8.1 Virtual Timer System Registers blob | commitdiff | raw | diff to current
2018-06-14 Giacomo Travagliniarch-arm: Add Illegal Execution flag to PCState blob | commitdiff | raw | diff to current
2018-06-11 Giacomo Travaglinimisc: Using smart pointers for memory Requests blob | commitdiff | raw | diff to current
2018-05-29 Giacomo Travagliniarch-arm: ISA param for treating MISCREG_IMPDEF_UNIMPL... blob | commitdiff | raw | diff to current
2018-05-08 Giacomo Travagliniarch-arm: Map ID_x_EL1 registers to AArch32 version blob | commitdiff | raw | diff to current
2018-04-19 Giacomo Travagliniarch-arm: Add ARMv8.1 TTBR1_EL2 register blob | commitdiff | raw | diff to current
2018-04-18 Chuan Zhuarch-arm: Fix masking in CPACR_EL1 blob | commitdiff | raw | diff to current
2018-04-18 Chuan Zhuarch-arm: Mask out unsupported trapped exception handli... blob | commitdiff | raw | diff to current
2018-04-18 Chuan Zhuarch-arm: Correct masking of cp10 and cp11 in CPACR blob | commitdiff | raw | diff to current
2018-04-18 Giacomo Travagliniarch-arm: Using explicit invalidation in TLB blob | commitdiff | raw | diff to current
2018-04-06 Giacomo Travagliniarch-arm: Fix secure write of SCTLR when EL3 is AArch64 blob | commitdiff | raw | diff to current
2018-03-23 Giacomo Travagliniarch-arm: Distinguish IS TLBI from non-IS blob | commitdiff | raw | diff to current
2018-03-23 Giacomo Travagliniarch-arm: Created function for TLB ASID Invalidation blob | commitdiff | raw | diff to current
2018-03-12 Giacomo Travagliniarch-arm: Adding IPA-Based Invalidating instructions blob | commitdiff | raw | diff to current
2018-03-12 Giacomo Travagliniarch-arm: Implement missing aarch32 TLBI registers blob | commitdiff | raw | diff to current
2018-03-08 Giacomo Travagliniarch-arm: Fix FSC generation in AbortFault blob | commitdiff | raw | diff to current
2018-02-16 Giacomo Travagliniarch-arm: Change ArmFault cast from reinterpret to... blob | commitdiff | raw | diff to current
2018-02-08 Giacomo Travagliniarch-arm: Don't change PSTATE in Illegal Exception... blob | commitdiff | raw | diff to current
2018-01-29 Curtis Dunhamarch-arm: understandably initialize register permissions blob | commitdiff | raw | diff to current
2018-01-29 Curtis Dunhamarm: extend MiscReg metadata structures blob | commitdiff | raw | diff to current
2018-01-29 Curtis Dunhamarch-arm: understandably initialize register mappings blob | commitdiff | raw | diff to current
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