2020-11-03 |
Giacomo Travaglini | arch-arm: Fix implementation of TLBI_VMALL instructions |
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2020-11-03 |
Giacomo Travaglini | arch-arm: Add el2Enabled cached variable |
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2020-10-30 |
Gabe Black | misc: Delete the now unnecessary create methods. |
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2020-10-23 |
Giacomo Travaglini | arch-arm: Fix implementation of TLBI ALLEx instructions |
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2020-10-21 |
Giacomo Travaglini | arch-arm: Replace any getDTBPtr/getITBPtr usage |
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2020-10-14 |
Gabe Black | misc: Standardize the way create() constructs SimObjects. |
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2020-10-01 |
Bobby R. Bruce | misc: Merge branch 'release-staging-v20.1.0.0' into... |
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2020-09-29 |
Timothy Hayes | arch-arm: Instantiate a single HTM checkpoint at ISA... |
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2020-09-25 |
Bobby R. Bruce | misc: Merge branch 'release-staging-v20.1.0.0' into... |
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2020-09-22 |
Giacomo Travaglini | arch-arm: TLBI ALLE2IS should broadcast to the IS domain |
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2020-09-10 |
Shivani Parekh | misc: Replaced master/slave terminology |
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2020-09-08 |
Timothy Hayes | arch-arm: Transactional Memory Extension (TME) |
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2020-08-28 |
Giacomo Travaglini | arch-arm: Fix coding style in addressTranslation methods |
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2020-08-26 |
Giacomo Travaglini | arch-arm: Rewrite addressTranslation to use BitUnions |
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2020-08-26 |
Giacomo Travaglini | arch-arm: Remove deadcode from AArch64 address translation |
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2020-08-26 |
Giacomo Travaglini | arch-arm: Refactor Address Translation (AT) code |
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2020-07-31 |
Jordi Vaquero | arch-arm: Implementing SecureEL2 feature for Armv8 |
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2020-07-27 |
Jordi Vaquero | arch-arm: Implement ARM8.1-VHE feature |
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2020-07-04 |
Bobby R. Bruce | misc: Merged m5ops_base hotfix into develop |
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2020-07-02 |
Jordi Vaquero | arch-arm: Implementation of SelfHosted Debug Software... |
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2020-06-29 |
Jordi Vaquero | arch-arm: Implementation of ARMv8 SelfDebug Watchpoints |
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2020-06-25 |
Giacomo Travaglini | arch-arm: Fix arm switcheroo regressions |
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2020-06-22 |
Jordi Vaquero | arch-arm: Implementation of Hardware Breakpoint exception |
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2020-06-12 |
Gabe Black | arch,cpu: Add a setThreadContext method to the ISA... |
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2020-06-09 |
Gabe Black | arch,cpu,dev,sim,mem: Collect System thread elements... |
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2020-06-08 |
Bobby R. Bruce | misc: Merge hotfix v20.0.0.2 into develop |
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2020-06-02 |
Bobby R. Bruce | misc: Merge branch version update into develop |
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2020-06-02 |
Bobby R. Bruce | misc: Merge in 'hotfix-m5-tick-rounding-error' |
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2020-05-28 |
Bobby R. Bruce | Merge branch 'release-staging-v20.0.0.0' into develop |
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2020-05-28 |
Bobby R. Bruce | misc: Merge branch 'release-staging-v20.0.0.0' into... |
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2020-05-05 |
Ciro Santilli | arch-arm: show names on --debug-flags MiscRegs write: |
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2020-04-15 |
Giacomo Travaglini | arch-arm: Override ISA::takeOverFrom for the Arm ISA |
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2020-04-15 |
Giacomo Travaglini | arch-arm: Remove unnecessary haveGICv3CPUInterface |
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2020-03-12 |
Gabe Black | arm: Eliminate the MustBeOne ARM specific request flag. |
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2020-03-10 |
Adrian Herrera | arch-arm: GenericTimer arch regs, perms/trapping |
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2020-03-07 |
Gabe Black | arch,cpu,gpu-compute,mem: Remove asid from Request... |
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2020-02-26 |
Bobby R. Bruce | misc: merge branch 'release-staging-v19.0.0.0' into... |
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2020-02-24 |
Bobby R. Bruce | misc: Merged release-staging-v19.0.0.0 into develop |
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2020-02-19 |
Adrian Herrera | arch-arm: ArmISA::clear, inval TLB cached miscregs |
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2020-02-18 |
Gabe Black | arm: Delete authors lists from the arm files. |
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2020-02-13 |
Gabe Black | arm: "Correct" the spelling of flavor. |
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2020-02-05 |
Gabe Black | arch: Introduce a base class for ISA classes. |
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2020-02-04 |
Adrian Herrera | arch-arm: reg access permissions highest EL helper |
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2019-11-25 |
Adrian Herrera | arch-arm: default MIDR for Armv8 ISA processors |
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2019-11-18 |
Adrian Herrera | arch-arm: R/W interface to AArch32 HCR2 misc reg |
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2019-10-19 |
Gabe Black | arch: Make a base class for Interrupts. |
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2019-09-19 |
Giacomo Travaglini | arch-arm: PSTATE.PAN changes should inval cached regs... |
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2019-09-06 |
Giacomo Travaglini | arch-arm: Fix read/setMiscReg for AArch32 GICv3 ICC... |
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2019-08-07 |
Jordi Vaquero | arch-arm: adding register control flags enabling LSE... |
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2019-08-05 |
Giacomo Travaglini | arch-arm: Implement ARMv8.1-PAN, Privileged access... |
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2019-05-23 |
Giacomo Travaglini | arch-arm: Expose haveGicv3CPUInterface to the ISA interface |
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2019-04-25 |
Giacomo Travaglini | arch-arm: Remove un-needed hyp flag in TLBI operations |
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2019-04-25 |
Giacomo Travaglini | arch-arm: Correct target EL field in TLBI operations |
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2019-04-02 |
Giacomo Travaglini | dev-arm: Make GICv3 maintenance interrupt an ArmInterrupt |
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2019-03-14 |
Giacomo Gabrielli | arch-arm,cpu: Add initial support for Arm SVE |
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2019-02-18 |
Giacomo Travaglini | arch-arm: Move GICv3 detection at startup time |
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2019-01-25 |
Giacomo Travaglini | arch-arm: Inital vector rename mode depending on A32/A64 |
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2019-01-22 |
Gabe Black | arch: cpu: Stop passing around misc registers by reference. |
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2019-01-22 |
Gabe Black | arm: Get rid of some register type definitions. |
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2019-01-16 |
Giacomo Travaglini | arch-arm: Read VMPIDR instead of MPIDR when EL2 is... |
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2019-01-16 |
Anouk Van Laer | arch-arm: Added TLBI_ALL EL2 instruction |
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2019-01-10 |
Jairo Balart | dev-arm: Add a GICv3 model |
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2019-01-03 |
Curtis Dunham | arm: properly handle RES0/1 for SCTLRs |
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2018-12-19 |
Giacomo Travaglini | arch-arm: Add Crypto in SE mode |
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2018-11-14 |
Giacomo Travaglini | arch-arm: Print register name when warning on AT instru... |
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2018-11-07 |
Giacomo Travaglini | arch-arm: ArmSystem::resetAddr64 renamed to be used... |
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2018-11-07 |
Giacomo Travaglini | arch-arm: Refactor ISA::clear by adding a ISA::clear32... |
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2018-10-09 |
Giacomo Travaglini | arch-arm: Add have_crypto System parameter |
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2018-10-01 |
Giacomo Travaglini | arch-arm: Implement AArch64 ID_AA64MMFR2_EL1 register |
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2018-10-01 |
Giacomo Travaglini | arch-arm: Init AArch64 ID registers in SE mode |
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2018-09-10 |
Andreas Sandberg | arm: Add support for tracking TCs in ISA devices |
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2018-07-16 |
Giacomo Travaglini | arch-arm: Introduce ARMv8.1 Virtual Timer System Registers |
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2018-06-14 |
Giacomo Travaglini | arch-arm: Add Illegal Execution flag to PCState |
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2018-06-11 |
Giacomo Travaglini | misc: Using smart pointers for memory Requests |
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2018-05-29 |
Giacomo Travaglini | arch-arm: ISA param for treating MISCREG_IMPDEF_UNIMPL... |
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2018-05-08 |
Giacomo Travaglini | arch-arm: Map ID_x_EL1 registers to AArch32 version |
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2018-04-19 |
Giacomo Travaglini | arch-arm: Add ARMv8.1 TTBR1_EL2 register |
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2018-04-18 |
Chuan Zhu | arch-arm: Fix masking in CPACR_EL1 |
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2018-04-18 |
Chuan Zhu | arch-arm: Mask out unsupported trapped exception handli... |
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2018-04-18 |
Chuan Zhu | arch-arm: Correct masking of cp10 and cp11 in CPACR |
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2018-04-18 |
Giacomo Travaglini | arch-arm: Using explicit invalidation in TLB |
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2018-04-06 |
Giacomo Travaglini | arch-arm: Fix secure write of SCTLR when EL3 is AArch64 |
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2018-03-23 |
Giacomo Travaglini | arch-arm: Distinguish IS TLBI from non-IS |
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2018-03-23 |
Giacomo Travaglini | arch-arm: Created function for TLB ASID Invalidation |
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2018-03-12 |
Giacomo Travaglini | arch-arm: Adding IPA-Based Invalidating instructions |
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2018-03-12 |
Giacomo Travaglini | arch-arm: Implement missing aarch32 TLBI registers |
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2018-03-08 |
Giacomo Travaglini | arch-arm: Fix FSC generation in AbortFault |
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2018-02-16 |
Giacomo Travaglini | arch-arm: Change ArmFault cast from reinterpret to... |
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2018-02-08 |
Giacomo Travaglini | arch-arm: Don't change PSTATE in Illegal Exception... |
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2018-01-29 |
Curtis Dunham | arch-arm: understandably initialize register permissions |
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2018-01-29 |
Curtis Dunham | arm: extend MiscReg metadata structures |
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2018-01-29 |
Curtis Dunham | arch-arm: understandably initialize register mappings |
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2017-12-22 |
Gabe Black | arch,cpu: "virtualize" the TLB interface. |
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2017-12-14 |
Jason Lowe-Power | misc: Updates for gcc7.2 for x86 |
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2017-07-05 |
Rekai Gonzalez-Alb... | cpu: Added interface for vector reg file |
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2017-02-09 |
Bjoern A. Zeeb | arm: AArch64 report cache size correctly when reading... |
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2016-11-09 |
Brandon Potter | style: [patch 1/22] use /r/3648/ to reorganize includes |
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2016-12-19 |
Curtis Dunham | arm: provide correct timer availability in ID_PFR1... |
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2016-12-19 |
Curtis Dunham | arm: compute ID_AA64PFR{0,1}_EL1 registers |
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2016-12-19 |
Curtis Dunham | arm: compute ID_PFR{0,1} registers |
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