misc: Replaced master/slave terminology
[gem5.git] / src / arch / arm / tlb.cc
2020-09-10 Shivani Parekhmisc: Replaced master/slave terminology
2020-08-18 Emily Brickeyarch-arm: convert tlb to new style stats
2020-08-18 Giacomo Travagliniarch-arm: Early checking if debug is enabled in TLB
2020-08-14 Giacomo Travagliniarch-arm: Use isSecure variable for Stage2Lookup
2020-08-14 Giacomo Travagliniarch-arm: VSTTBR_EL2 doesn't contain a VMID field
2020-08-14 Giacomo Travagliniarch-arm: Fix XN in TLB permissions
2020-08-10 Giacomo Travagliniarch-arm: Reduce boilerplate when extracting SelfDebug...
2020-07-31 Jordi Vaqueroarch-arm: Implementing SecureEL2 feature for Armv8
2020-07-27 Jordi Vaqueroarch-arm: Implement ARM8.1-VHE feature
2020-07-15 Giacomo Travagliniarch-arm: AddressSize check on translateMmuOff for...
2020-07-13 Giacomo Travagliniarch-arm: Move breakpoint/watchpoint check out of the TLB
2020-07-06 Jordi Vaqueroarch-arm: Add Check for AddressSize Fault
2020-07-06 Jordi Vaqueroarch-arm: Implementation of Vector Catch debug exception
2020-07-04 Bobby R. Brucemisc: Merged m5ops_base hotfix into develop
2020-07-02 Jordi Vaqueroarch-arm: Implementation of SelfHosted Debug Software...
2020-06-29 Jordi Vaqueroarch-arm: Implementation of ARMv8 SelfDebug Watchpoints
2020-06-22 Jordi Vaqueroarch-arm: Implementation of Hardware Breakpoint exception
2020-03-26 Gabe Blackarch,sim: Return whether or not a pseudo inst was recog...
2020-03-12 Gabe Blackarm: Eliminate the MustBeOne ARM specific request flag.
2020-03-07 Gabe Blackarch,cpu,gpu-compute,mem: Remove asid from Request...
2020-03-04 Gabe Blackarch,cpu,mem: Replace the mmmapped IPR mechanism with...
2020-02-26 Bobby R. Brucemisc: merge branch 'release-staging-v19.0.0.0' into...
2020-02-24 Bobby R. Brucemisc: Merged release-staging-v19.0.0.0 into develop
2020-02-18 Gabe Blackarm: Delete authors lists from the arm files.
2020-02-11 Gabe Blackarch: Get rid of the generic mmapped IPR mechanism.
2020-02-11 Gabe Blackarm: Call pseudoInst directly from the mmapped IPR...
2020-02-06 Jordi Vaqueroarch-arm: This commit adds Pointer Authentication feature.
2020-02-04 Giacomo Travagliniarch-arm: Split translateFs to distinguish when MMU...
2020-01-22 Gabe Blackarm: Remove checkpointing from the ARM TLBs.
2019-09-18 Giacomo Travagliniarch-arm: Fix Data Abort ISS when caused by Atomic...
2019-09-18 Giacomo Travagliniarch-arm: PSTATE.PAN affecting EL2 only when HCR_EL2...
2019-08-20 Giacomo Travagliniarch-arm: Replace occ of opModeToEL(currOpMode/cpsr...
2019-08-05 Giacomo Travagliniarch-arm: Implement ARMv8.1-PAN, Privileged access...
2019-07-17 Giacomo Travagliniarch-arm: Use ExceptionLevel type in TlbEntry
2019-06-26 Anouk Van Laerarch, arm: Update miscRegs in getTE
2019-05-14 Javier Buenoarch-arm: Do not check MustBeOne flag for TLB requests...
2019-04-26 Giacomo Travagliniarch-arm: updateMiscReg not setting isHyp in aarch64
2019-04-25 Giacomo Travagliniarch-arm: Remove un-needed hyp flag in TLBI operations
2019-03-21 Andrea Mondellidev-arm: ambiguous use of getPort()
2019-03-19 Gabe Blackarch, cpu, dev, gpu, mem, sim, python: start using...
2019-03-01 Andrea Mondellimem-cache: alias to mem::getMasterPort in TLB class
2018-11-28 Rekai Gonzalez-Alb... cpu,arch-arm: Initialise data members
2018-11-05 Anouk Van Laerarch, arm: Effect of AT instructions on descriptor...
2018-06-14 Giacomo Travagliniarch-arm: Add Illegal Execution flag to PCState
2018-06-11 Giacomo Travaglinimisc: Using smart pointers for memory Requests
2018-06-06 Andreas Sandbergarch-arm: Respect EL from translation type
2018-02-16 Chuan Zhuarch-arm: Fix syntax error in TLB::getResultTe
2018-02-07 Nikos Nikolerisarch-arm: Check cache maintenance insts for permission...
2018-02-07 Giacomo Travagliniarch-arm: Change function name for banked miscregs
2017-12-22 Gabe Blackarch,cpu: "virtualize" the TLB interface.
2017-12-05 Nikos Nikolerisarm: Add CMO support for Non-Cacheable memory
2017-05-09 Andreas Sandbergarm: Add support for memory-mapped m5ops
2017-02-21 Nikos Nikolerisarm: Blame the right instruction address on a Prefetch...
2016-11-09 Brandon Potterstyle: [patch 1/22] use /r/3648/ to reorganize includes
2016-08-15 Nikos Nikoleriscpu, arch: fix the type used for the request flags
2016-08-02 Dylan Johnsonarm: Add TLBI instruction for stage 2 IPA's
2016-08-02 Dylan Johnsonarm: Fix stage 2 determination in table walker
2016-08-02 Dylan Johnsonarm: Fix EL perceived at TLB for address translation...
2016-08-02 Dylan Johnsonarm: add stage2 translation support
2016-07-11 Andreas Sandbergarm: Don't consult the TLB test iface for functional...
2016-06-06 Stephan Diestelhorstsim: Call regStats of base-class as well
2016-06-02 Curtis Dunhamarm: refactor page table format determination
2016-05-31 Andreas Sandbergarm: Correctly check translation mode (aarch64/aarch32)
2016-05-26 Andreas Sandbergarm: Fix incorrect TLB permission check in aarch32
2016-03-21 Andreas Sandbergarm: Refactor the TLB test interface
2016-02-07 Steve Reinhardtstyle: fix missing spaces in control statements
2015-09-30 Mitch Hayengaarm: Change TLB Software Caching
2015-08-21 Andreas Hanssonarm, mem: Remove unused CLEAR_LL request flag
2015-07-07 Andreas Sandbergsim: Refactor the serialization base class
2015-06-21 Andreas Sandbergarm: Cleanup arch headers to remove dma_device.hh depen...
2015-05-26 Nathanael Premillieuarm: Make address translation faster with better caching
2015-05-05 Andreas Sandbergarm: Relax ordering for some uncacheable accesses
2015-05-05 Andreas Sandbergmem, cpu: Add a separate flag for strictly ordered...
2015-05-05 Andreas Hanssonarm: Remove unnecessary boot uncachability
2015-03-02 Andreas Hanssonarm: Share a port for the two table walker objects
2014-12-23 Andreas Sandbergarm: Raise an alignment fault if a PC has illegal alignment
2014-11-14 Andreas Hanssonarm: Fixes based on UBSan and static analysis
2014-10-30 Ali Saidiautomated merge
2014-10-30 Ali Saidiarm: Fix multi-system AArch64 boot w/caches.
2014-10-16 Andreas Hanssonarch: Use shared_ptr for all Faults
2014-10-16 Andreas Sandbergarm: Add TLB PMU probes
2014-09-27 Andreas Hanssonarm: Fixed undefined behaviours identified by gcc
2014-09-12 Andrew Bardsleystyle: Fix line continuation, especially in debug messages
2014-05-09 Geoffrey Blakearch, arm: Preserve TLB bootUncacheability when switchi...
2014-01-24 ARM gem5 Developersarm: Add support for ARMv8 (AArch64 & AArch32)
2014-01-24 Dam Sunwoomem: per-thread cache occupancy and per-block ages
2013-10-31 Prakash Ramrakhyanimem: Add privilege info to request class
2013-06-03 Andreas Sandbergarch: Create a method to finalize physical addresses
2013-02-15 Mrinmoy Ghosharm: fix a page table walker issue where a page could...
2013-01-07 Andreas Sandbergarm: Invalidate cached TLB configuration in drainResume
2012-10-15 Andreas HanssonPort: Add protocol-agnostic ports in the port hierarchy
2012-03-30 William WangMEM: Introduce the master/slave port sub-classes in C++
2012-02-01 Gabe BlackMerge ... head, hopefully the last time for this batch.
2012-01-31 Geoffrey BlakeCheckerCPU: Re-factor CheckerCPU to be compatible with...
2012-01-31 Gabe BlackMerge with main repository.
2012-01-29 Gabe BlackYet another merge with the main repository.
2012-01-29 Gabe BlackImplement Ali's review feedback.
2012-01-28 Gabe BlackMerge with the main repo.
2012-01-16 Gabe BlackMerge yet again with the main repository.
2012-01-07 Gabe BlackAnother merge with the main repository.
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