ac/nir: drop nir_to_llvm_context from visit_load_local_invocation_index()
[mesa.git] / src / intel / compiler / brw_disasm.c
2018-02-10 Grazvydas Ignotasintel/compiler: fix 64bit value prints on 32bit
2017-10-20 Matt Turneri965: Add align1 ternary instruction disassembler support
2017-10-20 Matt Turneri965: Add align1 ternary instruction support to convers...
2017-10-20 Matt Turneri965: Rename brw_inst's functions that access the 3src...
2017-10-20 Matt Turneri965: Rename brw_inst 3src functions in preparation...
2017-10-20 Matt Turneri965: Print subreg in units of type-size on ternary...
2017-10-04 Matt Turneri965: Fix support for disassembling 64-bit integer...
2017-08-21 Matt Turneri965: Stop using hardware register types directly
2017-08-21 Matt Turneri965: Add brw_hw_reg_type_to_letters() and use it in...
2017-08-21 Matt Turneri965: Rename brw_inst's functions that access the regis...
2017-08-21 Matt Turneri965: Reverse file/type arguments to register type...
2017-08-21 Matt Turneri965: Add support for disassembling 64-bit integer...
2017-08-21 Matt Turneri965: Use separate enums for register vs immediate...
2017-08-02 Matt Turneri965: Fix indentation
2017-05-26 Jason Ekstrandintel/compiler: Make brw_disasm take const assembly
2017-04-14 Iago Toral Quirogai965/disasm: also print nibctrl in IVB for execsize=8
2017-03-13 Jason Ekstrandi965: Move the back-end compiler to src/intel/compiler