reenable tests
[openpower-isa.git] / src / openpower / consts.py
2023-05-30 Jacob Lifshayuse a different default MSR value for unit tests since...
2023-05-22 Luke Kenneth Casso... make style of consts.py consistent with standard python
2023-05-21 Luke Kenneth Casso... big set of updates to LD/ST in line with new spec changes
2023-05-15 Luke Kenneth Casso... fix empty slot in EXTRA
2023-05-15 Luke Kenneth Casso... move RG bit in CRops to Mode[2] from Mode[3] MSB0-numbering
2023-04-06 Luke Kenneth Casso... add power_decode_svp64_rm.py capability for new LD...
2022-10-14 Luke Kenneth Casso... add new LD-Immediate Post constants
2022-09-24 Dmitry Selyutinconsts: introduce SEA field
2022-09-24 Luke Kenneth Casso... add RC1 support to ISACaller.
2022-09-18 Luke Kenneth Casso... remove subvector mode from sv/trans/svp64.py
2022-09-17 Luke Kenneth Casso... add zz mode to sv/trans/svp64.py as a hack
2022-09-05 Luke Kenneth Casso... remove parallel-reduction mode from decoder and sv...
2022-09-05 Luke Kenneth Casso... rename "PARALLEL" enums to "PTREDUCE" - parallel tree...
2022-08-14 Luke Kenneth Casso... go with separate bit for Pack/Unpack mode in SVP64RMMod...
2022-07-30 Luke Kenneth Casso... add PACK/UNPACK constants for RM-2P-1S1D-PU
2022-02-28 Dmitry Selyutinopenpower.consts: replace botchify with metaclass
2022-02-28 Dmitry Selyutinopenpower.const: switch to enum class
2022-01-19 Luke Kenneth Casso... add spr-to-state conversion, and support for state1...
2021-09-04 Luke Kenneth Casso... redo SVP64 RM Decode to new CTR-Test Mode (svstep not...
2021-08-11 Luke Kenneth Casso... corrections to SVP64 Branch Conditional
2021-08-10 Luke Kenneth Casso... corrections to SVP64 Branch RM Mode decoding
2021-08-08 Luke Kenneth Casso... add start of SVP64ASM encoder for sv.bc and sv.bclr
2021-08-01 Luke Kenneth Casso... bit of a big update, remove all bit-reversed LD operati...
2021-07-15 Luke Kenneth Casso... stop using MSR vfirst bit, move to SVSTATE bit 63 instead
2021-07-08 Luke Kenneth Casso... add in extra "vertical" mode into SVP64 setvl
2021-06-23 Luke Kenneth Casso... add start of bit-reverse mode for LD/ST to SVP64 encode...
2021-06-19 Luke Kenneth Casso... add "reverse-gear" mode to mapreduce in SVP64
2021-05-04 Luke Kenneth Casso... copy over svstate from core state in PowerDecoder2
2021-04-23 Luke Kenneth Casso... move Regfile enums here
2021-04-23 Luke Kenneth Casso... move Regfile enums here
2021-04-23 Luke Kenneth Casso... move consts from soc