power_insn: stricter reg type check
[openpower-isa.git] / src / openpower / decoder / isa / caller.py
2022-09-05 Luke Kenneth Casso... rename remap_debug to remap_set_steps
2022-09-05 Luke Kenneth Casso... please do not use format-specifiers
2022-09-05 Luke Kenneth Casso... remove yet more f"" specifiers
2022-09-05 Luke Kenneth Casso... removing use of format. please do not use format
2022-09-04 Jacob Lifshayreallocate opcodes for ffadds (converted to X-FORM...
2022-09-02 Luke Kenneth Casso... add svshape2 to ISACaller
2022-08-30 Dmitry Selyutinpower_insn: convert PO field name to lower case
2022-08-29 Luke Kenneth Casso... add a "ffmadds." test, not yet actually checking Rc=1
2022-08-29 Luke Kenneth Casso... fix test_issuer.py nosvp64 mul, "mullw." was getting
2022-08-29 Dmitry Selyutincaller.py: switch to new fields
2022-08-29 Dmitry Selyutinselectable_int: refactor fields mappings
2022-08-29 Luke Kenneth Casso... add setvl and other sv* management instructions to...
2022-08-29 Luke Kenneth Casso... add logging into ISACaller.handle_overflow to see what...
2022-08-29 Luke Kenneth Casso... switch off XER.so reading on "setvl.", it makes no...
2022-08-29 Jacob Lifshaylog memory in a more fancy format, like hexdump -C
2022-08-26 Luke Kenneth Casso... sigh, update setvl tests, to spec, and ISACaller
2022-08-26 Luke Kenneth Casso... add setvl unit tests for overflow condition.
2022-08-26 Luke Kenneth Casso... Revert "fix setvl. not setting CR0 properly"
2022-08-26 Jacob Lifshayadd some logging
2022-08-26 Jacob Lifshayfix setvl. not setting CR0 properly
2022-08-25 Jacob Lifshayfix deprecated imports
2022-08-24 Jacob Lifshaymisc cleanup
2022-08-15 Luke Kenneth Casso... codeshuffle
2022-08-15 Luke Kenneth Casso... swap complicated bits, simplify ISACaller, reduce inden...
2022-08-15 Luke Kenneth Casso... debug print for ISACaller pack/unpack
2022-08-14 Luke Kenneth Casso... dang missed *another* argument in ISACaller on the...
2022-08-14 Luke Kenneth Casso... remove LD/ST-shift mode from ISACaller
2022-07-31 Luke Kenneth Casso... whoops should be True
2022-07-31 Luke Kenneth Casso... whoops initialise nia_update to False
2022-07-27 Konstantinos Marga... Add fishmv instruction (bug #887)
2022-07-26 Konstantinos Marga... Add fmvis instruction + tests, bug #887
2022-07-21 Luke Kenneth Casso... whoops missing variables in new subfunction after
2022-07-21 Luke Kenneth Casso... add dsubstep to ISACaller
2022-07-21 Luke Kenneth Casso... fix loopend conditions for subvectors in ISACaller
2022-07-20 Luke Kenneth Casso... rename substep to ssubstep, add dsubstep to SVP64State
2022-07-20 Luke Kenneth Casso... add first subvl unit test, subvl comes from
2022-07-18 Luke Kenneth Casso... move D-Immediate rewriting in ISACaller into separate...
2022-07-18 Luke Kenneth Casso... move inputs in ISACaller into get_input()
2022-07-18 Luke Kenneth Casso... move debug remap to ISACaller.remap_debug()
2022-07-18 Luke Kenneth Casso... whitespace and function-return code-morphing in ISACaller
2022-07-18 Luke Kenneth Casso... move another function in ISACaller (check_write)
2022-07-18 Luke Kenneth Casso... begin function split in ISACaller
2022-07-18 Luke Kenneth Casso... remove duplicate code create ISACaller.advance_svstate_...
2022-07-18 Luke Kenneth Casso... add SUBVL (substep) support to PowerDecoder2 and to...
2022-07-14 Luke Kenneth Casso... got fed up of long list of ifs for manually decoded...
2022-07-10 Luke Kenneth Casso... non-persistence enabled on svindex as well as svremap
2022-07-10 Luke Kenneth Casso... fix svindex pseudocode
2022-07-09 Luke Kenneth Casso... pass GPR to SVSHAPEs in ISACaller
2022-06-26 Luke Kenneth Casso... make svstep output srcstep/dststep, basically viota
2022-06-26 Luke Kenneth Casso... add test case for kaivb to jump to 0x2700
2022-06-23 Andrey MiroshnikovAdded bmask, pywriter failing
2022-06-22 Andrey MiroshnikovAdded cprop to caller, enums, svp64
2022-06-20 Luke Kenneth Casso... add absolute-signed-diff next to absolute-unsigned...
2022-06-20 Luke Kenneth Casso... rename absadd[us] to absdac[ud]
2022-06-19 Luke Kenneth Casso... add absadd (unsigned) DRAFT
2022-06-19 Luke Kenneth Casso... add absolute-difference DRAFT
2022-06-19 Luke Kenneth Casso... add average-add DRAFT pseudocode and CSV
2022-06-19 Luke Kenneth Casso... add maxs DRAFT instruction
2022-05-03 Jacob Lifshayadd Rc to ternlogi
2022-05-03 Jacob Lifshayformat code
2022-04-20 Dmitry Selyutinselectable_int: derive SelectableIntMapping on per...
2022-04-20 Dmitry Selyutinisa.caller: support default SVP64PrefixFields initializ...
2022-04-19 Dmitry Selyutinisa.caller: support whole integer pseudo-field
2022-04-19 Dmitry Selyutinisa.caller: refactor SVP64PrefixFields class
2022-04-19 Dmitry Selyutinisa.caller: refactor SVP64RMFields class
2022-04-07 Luke Kenneth Casso... whitespace (80 char limit)
2022-04-07 Luke Kenneth Casso... comment 64-bit of predicate (all 1s)
2022-01-18 Jacob Lifshaygrev[w][i][.] pseudo-code works
2022-01-18 Jacob Lifshayformat code
2021-12-20 Luke Kenneth Casso... whoops forgot to trap if non-execute (instruction)...
2021-12-19 Luke Kenneth Casso... TODO notes for executing ISACaller Invalid Instruction...
2021-12-19 Luke Kenneth Casso... pass the mode (LOAD,EXECUTE,STORE) through ISACaller...
2021-12-10 Jacob Lifshaychange ternlogi to not have Rc field
2021-12-09 Jacob Lifshaymake ternlogi tests run
2021-12-04 Luke Kenneth Casso... raise a MemException in ISACaller RADIXMMU
2021-11-30 Luke Kenneth Casso... attempting to use PowerDecode2 in non-svp64 mode
2021-11-04 klehmancaller.py: Fix ISACaller modifying test state
2021-09-29 Dmitry Selyutinisa/caller: initialize helper and redirect XLEN
2021-09-28 Luke Kenneth Casso... move FPDIV, FPMUL (etc) to ISAFPHelpers class
2021-09-25 Luke Kenneth Casso... inherit ISACallerHelper in ISACaller
2021-09-22 Luke Kenneth Casso... take a copy of SPRs so they are not modified by ISACaller
2021-08-21 Luke Kenneth Casso... set XLEN=64 in ISACaller
2021-08-15 Luke Kenneth Casso... take copy of GPR/FPR inputs into ISACaller
2021-08-15 Luke Kenneth Casso... sv.bc test jumping to wrong location (offset 0xc not...
2021-08-14 Luke Kenneth Casso... create an end loop condition which tells the sv.bc...
2021-08-14 Luke Kenneth Casso... end loop condition in svp64 bc pseudo-code
2021-08-14 Luke Kenneth Casso... messy resolution of sv.bc testing, early-out detection.
2021-08-12 Luke Kenneth Casso... add ctr_ok and cond_ok to namespace to be able
2021-08-11 Luke Kenneth Casso... whoops test for sv.bc* matched accidentally, use explic...
2021-08-11 Luke Kenneth Casso... redirect sv.bc to new svbranch in ISACaller
2021-08-11 Luke Kenneth Casso... corrections to SVP64 Branch Conditional
2021-08-01 Luke Kenneth Casso... bit of a big update, remove all bit-reversed LD operati...
2021-07-28 Luke Kenneth Casso... argh, have LD-bitreverse select the offset from RA...
2021-07-28 Luke Kenneth Casso... code comments
2021-07-27 Luke Kenneth Casso... argh, LD/ST using DS has to be computed differently.
2021-07-24 Luke Kenneth Casso... add DS-Form support for sv.std
2021-07-24 Luke Kenneth Casso... added an extra SVP64 instruction, svstep, to replace...
2021-07-24 Luke Kenneth Casso... add ability to get current SVSHAPE indices into a register,
2021-07-23 Luke Kenneth Casso... "fix" fdmadd DCT mul-add-sub unit test with values...
2021-07-20 Luke Kenneth Casso... add inner sub-loop testing from svstep Rc=1
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