| 2022-08-26 |
Jacob Lifshay | fix setvl. not setting CR0 properly |
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| 2022-08-25 |
Jacob Lifshay | fix deprecated imports |
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| 2022-08-24 |
Jacob Lifshay | misc cleanup |
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| 2022-08-15 |
Luke Kenneth Casso... | codeshuffle |
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| 2022-08-15 |
Luke Kenneth Casso... | swap complicated bits, simplify ISACaller, reduce inden... |
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| 2022-08-15 |
Luke Kenneth Casso... | debug print for ISACaller pack/unpack |
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| 2022-08-14 |
Luke Kenneth Casso... | dang missed *another* argument in ISACaller on the... |
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| 2022-08-14 |
Luke Kenneth Casso... | remove LD/ST-shift mode from ISACaller |
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| 2022-07-31 |
Luke Kenneth Casso... | whoops should be True |
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| 2022-07-31 |
Luke Kenneth Casso... | whoops initialise nia_update to False |
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| 2022-07-27 |
Konstantinos Marga... | Add fishmv instruction (bug #887) |
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| 2022-07-26 |
Konstantinos Marga... | Add fmvis instruction + tests, bug #887 |
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| 2022-07-21 |
Luke Kenneth Casso... | whoops missing variables in new subfunction after |
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| 2022-07-21 |
Luke Kenneth Casso... | add dsubstep to ISACaller |
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| 2022-07-21 |
Luke Kenneth Casso... | fix loopend conditions for subvectors in ISACaller |
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| 2022-07-20 |
Luke Kenneth Casso... | rename substep to ssubstep, add dsubstep to SVP64State |
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| 2022-07-20 |
Luke Kenneth Casso... | add first subvl unit test, subvl comes from |
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| 2022-07-18 |
Luke Kenneth Casso... | move D-Immediate rewriting in ISACaller into separate... |
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| 2022-07-18 |
Luke Kenneth Casso... | move inputs in ISACaller into get_input() |
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| 2022-07-18 |
Luke Kenneth Casso... | move debug remap to ISACaller.remap_debug() |
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| 2022-07-18 |
Luke Kenneth Casso... | whitespace and function-return code-morphing in ISACaller |
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| 2022-07-18 |
Luke Kenneth Casso... | move another function in ISACaller (check_write) |
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| 2022-07-18 |
Luke Kenneth Casso... | begin function split in ISACaller |
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| 2022-07-18 |
Luke Kenneth Casso... | remove duplicate code create ISACaller.advance_svstate_... |
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| 2022-07-18 |
Luke Kenneth Casso... | add SUBVL (substep) support to PowerDecoder2 and to... |
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| 2022-07-14 |
Luke Kenneth Casso... | got fed up of long list of ifs for manually decoded... |
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| 2022-07-10 |
Luke Kenneth Casso... | non-persistence enabled on svindex as well as svremap |
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| 2022-07-10 |
Luke Kenneth Casso... | fix svindex pseudocode |
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| 2022-07-09 |
Luke Kenneth Casso... | pass GPR to SVSHAPEs in ISACaller |
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| 2022-06-26 |
Luke Kenneth Casso... | make svstep output srcstep/dststep, basically viota |
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| 2022-06-26 |
Luke Kenneth Casso... | add test case for kaivb to jump to 0x2700 |
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| 2022-06-23 |
Andrey Miroshnikov | Added bmask, pywriter failing |
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| 2022-06-22 |
Andrey Miroshnikov | Added cprop to caller, enums, svp64 |
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| 2022-06-20 |
Luke Kenneth Casso... | add absolute-signed-diff next to absolute-unsigned... |
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| 2022-06-20 |
Luke Kenneth Casso... | rename absadd[us] to absdac[ud] |
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| 2022-06-19 |
Luke Kenneth Casso... | add absadd (unsigned) DRAFT |
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| 2022-06-19 |
Luke Kenneth Casso... | add absolute-difference DRAFT |
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| 2022-06-19 |
Luke Kenneth Casso... | add average-add DRAFT pseudocode and CSV |
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| 2022-06-19 |
Luke Kenneth Casso... | add maxs DRAFT instruction |
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| 2022-05-03 |
Jacob Lifshay | add Rc to ternlogi |
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| 2022-05-03 |
Jacob Lifshay | format code |
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| 2022-04-20 |
Dmitry Selyutin | selectable_int: derive SelectableIntMapping on per... |
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| 2022-04-20 |
Dmitry Selyutin | isa.caller: support default SVP64PrefixFields initializ... |
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| 2022-04-19 |
Dmitry Selyutin | isa.caller: support whole integer pseudo-field |
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| 2022-04-19 |
Dmitry Selyutin | isa.caller: refactor SVP64PrefixFields class |
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| 2022-04-19 |
Dmitry Selyutin | isa.caller: refactor SVP64RMFields class |
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| 2022-04-07 |
Luke Kenneth Casso... | whitespace (80 char limit) |
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| 2022-04-07 |
Luke Kenneth Casso... | comment 64-bit of predicate (all 1s) |
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| 2022-01-18 |
Jacob Lifshay | grev[w][i][.] pseudo-code works |
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| 2022-01-18 |
Jacob Lifshay | format code |
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| 2021-12-20 |
Luke Kenneth Casso... | whoops forgot to trap if non-execute (instruction)... |
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| 2021-12-19 |
Luke Kenneth Casso... | TODO notes for executing ISACaller Invalid Instruction... |
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| 2021-12-19 |
Luke Kenneth Casso... | pass the mode (LOAD,EXECUTE,STORE) through ISACaller... |
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| 2021-12-10 |
Jacob Lifshay | change ternlogi to not have Rc field |
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| 2021-12-09 |
Jacob Lifshay | make ternlogi tests run |
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| 2021-12-04 |
Luke Kenneth Casso... | raise a MemException in ISACaller RADIXMMU |
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| 2021-11-30 |
Luke Kenneth Casso... | attempting to use PowerDecode2 in non-svp64 mode |
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| 2021-11-04 |
klehman | caller.py: Fix ISACaller modifying test state |
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| 2021-09-29 |
Dmitry Selyutin | isa/caller: initialize helper and redirect XLEN |
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| 2021-09-28 |
Luke Kenneth Casso... | move FPDIV, FPMUL (etc) to ISAFPHelpers class |
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| 2021-09-25 |
Luke Kenneth Casso... | inherit ISACallerHelper in ISACaller |
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| 2021-09-22 |
Luke Kenneth Casso... | take a copy of SPRs so they are not modified by ISACaller |
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| 2021-08-21 |
Luke Kenneth Casso... | set XLEN=64 in ISACaller |
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| 2021-08-15 |
Luke Kenneth Casso... | take copy of GPR/FPR inputs into ISACaller |
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| 2021-08-15 |
Luke Kenneth Casso... | sv.bc test jumping to wrong location (offset 0xc not... |
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| 2021-08-14 |
Luke Kenneth Casso... | create an end loop condition which tells the sv.bc... |
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| 2021-08-14 |
Luke Kenneth Casso... | end loop condition in svp64 bc pseudo-code |
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| 2021-08-14 |
Luke Kenneth Casso... | messy resolution of sv.bc testing, early-out detection. |
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| 2021-08-12 |
Luke Kenneth Casso... | add ctr_ok and cond_ok to namespace to be able |
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| 2021-08-11 |
Luke Kenneth Casso... | whoops test for sv.bc* matched accidentally, use explic... |
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| 2021-08-11 |
Luke Kenneth Casso... | redirect sv.bc to new svbranch in ISACaller |
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| 2021-08-11 |
Luke Kenneth Casso... | corrections to SVP64 Branch Conditional |
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| 2021-08-01 |
Luke Kenneth Casso... | bit of a big update, remove all bit-reversed LD operati... |
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| 2021-07-28 |
Luke Kenneth Casso... | argh, have LD-bitreverse select the offset from RA... |
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| 2021-07-28 |
Luke Kenneth Casso... | code comments |
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| 2021-07-27 |
Luke Kenneth Casso... | argh, LD/ST using DS has to be computed differently. |
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| 2021-07-24 |
Luke Kenneth Casso... | add DS-Form support for sv.std |
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| 2021-07-24 |
Luke Kenneth Casso... | added an extra SVP64 instruction, svstep, to replace... |
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| 2021-07-24 |
Luke Kenneth Casso... | add ability to get current SVSHAPE indices into a register, |
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| 2021-07-23 |
Luke Kenneth Casso... | "fix" fdmadd DCT mul-add-sub unit test with values... |
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| 2021-07-20 |
Luke Kenneth Casso... | add inner sub-loop testing from svstep Rc=1 |
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| 2021-07-19 |
Luke Kenneth Casso... | bit of a reorg, adding option to test end of inner... |
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| 2021-07-16 |
Luke Kenneth Casso... | add fsins and fcoss to simulator |
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| 2021-07-15 |
Luke Kenneth Casso... | enable use of svremap "persist" mode, remove 4 instruct... |
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| 2021-07-15 |
Luke Kenneth Casso... | stop using MSR vfirst bit, move to SVSTATE bit 63 instead |
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| 2021-07-15 |
Luke Kenneth Casso... | big intrusive update: merge SVREMAP with SVSTATE, remov... |
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| 2021-07-14 |
Luke Kenneth Casso... | update SVSTATE to 64 bit length |
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| 2021-07-13 |
Luke Kenneth Casso... | change order of log printout for "writing gpr NN" |
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| 2021-07-11 |
Luke Kenneth Casso... | add svremap instruction into ISACaller |
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| 2021-07-11 |
Luke Kenneth Casso... | add SVREMAP SPR to ISACaller and parser |
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| 2021-07-11 |
Luke Kenneth Casso... | add SVREMAP SPR |
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| 2021-07-11 |
Luke Kenneth Casso... | rename svremap to svshape |
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| 2021-07-10 |
Luke Kenneth Casso... | more generic allow fft mode 2nd output detection. ... |
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| 2021-07-08 |
Luke Kenneth Casso... | end SVP64 "Vertical First" mode on rollover when end... |
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| 2021-07-08 |
Luke Kenneth Casso... | add CR0 setting and unit test on svstep |
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| 2021-07-08 |
Luke Kenneth Casso... | whoops must not reset last_op_svstate except when out... |
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| 2021-07-08 |
Luke Kenneth Casso... | testing new setvl "svstep" mode |
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| 2021-07-08 |
Luke Kenneth Casso... | add ability to explicitly increment SVSTATE srcstep... |
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| 2021-07-07 |
Luke Kenneth Casso... | get butterfly RADIX2 SVP64 example working, breaks... |
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| 2021-07-06 |
Luke Kenneth Casso... | when REMAP shape is zero, skip it in ISACaller. |
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