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power_insn: refactor opcode matching
[openpower-isa.git]
/
src
/
openpower
/
decoder
/
isa
/
remap_dct_yield.py
2021-08-01
Luke Kenneth Casso...
bit of a big update, remove all bit-reversed LD operati...
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2021-08-01
Luke Kenneth Casso...
add LD-half-swap for i-DCT which does not work. redesig...
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2021-07-31
Luke Kenneth Casso...
add outer-inner RADIX2 iDCT unit test.
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2021-07-31
Luke Kenneth Casso...
corrections to iDCT demo printout
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2021-07-30
Luke Kenneth Casso...
got i-DCT yield schedule operational in fastdctlee...
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2021-07-30
Luke Kenneth Casso...
start adding i-dct schedule with debug-print, hard...
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2021-07-28
Luke Kenneth Casso...
argh, have LD-bitreverse select the offset from RA...
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2021-07-28
Luke Kenneth Casso...
add mode for half-swap, to be combined with LD-bit...
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2021-07-27
Luke Kenneth Casso...
get DCT shortened table operational
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2021-07-27
Luke Kenneth Casso...
adding reduced COS table DCT test
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2021-07-27
Luke Kenneth Casso...
add new cos coefficient pre-computed and on-the-fly...
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2021-07-26
Luke Kenneth Casso...
use ydimsz as sub-mode in DCT/FFT butterfly
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2021-07-24
Luke Kenneth Casso...
create schedule for calculating COS coefficient in DCT
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2021-07-23
Luke Kenneth Casso...
add DCT outer butterfly iterative overlapping ADD schedule
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2021-07-23
Luke Kenneth Casso...
small inner DCT butterfly test, fix up order of fdmadds
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2021-07-23
Luke Kenneth Casso...
set up submodes for SVSHAPE, to include DCT butterfly...
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2021-07-22
Luke Kenneth Casso...
split out 2nd dct outer butterfly scheduler
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2021-07-22
Luke Kenneth Casso...
half way through converting in-place dct to yield unit...
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2021-07-22
Luke Kenneth Casso...
add inner and outer yield version of DCT inner and...
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2021-07-22
Luke Kenneth Casso...
copy of halfrev2 algorithm updated
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2021-07-22
Luke Kenneth Casso...
add REMAP DCT yield schedule function, TODO
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