add (untested) TestRunner based on soc test_runner.py
[openpower-isa.git] / src / openpower / decoder / isa / test_caller_svp64_dct.py
2021-08-02 Luke Kenneth Casso... add inverse DCT in-place unit test with bit-reversed...
2021-08-01 Luke Kenneth Casso... bit of a big update, remove all bit-reversed LD operati...
2021-07-31 Luke Kenneth Casso... add outer-inner RADIX2 iDCT unit test.
2021-07-31 Luke Kenneth Casso... add SVP64 i-DCT unit test for inner butterfly, coeffici...
2021-07-31 Luke Kenneth Casso... add i-DCT SVP64 unit test for outer butterfly
2021-07-28 Luke Kenneth Casso... got DCT LD-bit-rev demo operational in unit test
2021-07-27 Luke Kenneth Casso... adding reduced COS table DCT test
2021-07-27 Luke Kenneth Casso... add new DCT inner butterfly shorter COS-gen mode unit...
2021-07-27 Luke Kenneth Casso... fix new COSTABLE generator unit test,
2021-07-26 Luke Kenneth Casso... use ydimsz as sub-mode in DCT/FFT butterfly
2021-07-26 Luke Kenneth Casso... add dct cos 8 table test
2021-07-24 Luke Kenneth Casso... comments
2021-07-24 Luke Kenneth Casso... add DCT unit test combining DCT inner and outer butterfly
2021-07-23 Luke Kenneth Casso... add DCT outer butterfly iterative overlapping ADD schedule
2021-07-23 Luke Kenneth Casso... small inner DCT butterfly test, fix up order of fdmadds
2021-07-23 Luke Kenneth Casso... add DCT inner butterfly results test
2021-07-23 Luke Kenneth Casso... "fix" fdmadd DCT mul-add-sub unit test with values...
2021-07-23 Luke Kenneth Casso... add sv.fdmadds unit test