got cos intermediate working on iterative dct
[openpower-isa.git] / src / openpower / decoder / isa / test_caller_svp64_ldst.py
2021-07-17 Luke Kenneth Casso... add FP LOAD bit-reversed operations to ISACaller simulator
2021-06-29 Luke Kenneth Casso... re-enable accidentally-disabled sv ld/st tests
2021-06-26 Luke Kenneth Casso... add LD bit-reversed unit test
2021-05-30 Luke Kenneth Casso... add "normal" element-strided LD/ST decode/support to...
2021-05-29 Luke Kenneth Casso... comments
2021-05-29 Luke Kenneth Casso... add unit-strided LD/ST ISACaller SVP64 unit test