power_insn: support width specifier
[openpower-isa.git] / src / openpower / decoder / power_insn.py
2023-06-02 Dmitry Selyutinpower_insn: support width specifier
2023-06-02 Dmitry Selyutinpower_insn: fix Rc record property
2023-06-02 Dmitry Selyutinpower_enums: clean CR definitions
2023-06-02 Dmitry Selyutinpower_insn: support empty arguments
2023-06-02 Dmitry Selyutinpower_insn: support CR operands disassembly
2023-06-02 Dmitry Selyutinpower_insn: fix opcodes generation (again)
2023-06-02 Dmitry Selyutinpower_insn: simplify spans and bytes conversion
2023-06-02 Dmitry Selyutinpower_insn: fix operands iteration
2023-06-02 Dmitry Selyutinpower_insn: support CR operands assembly
2023-06-02 Dmitry Selyutinpower_insn: refactor extandable operands assembly
2023-06-02 Dmitry Selyutinpower_insn: remap GPR and FPR operands
2023-06-02 Dmitry Selyutinpower_insn: unify GPR and FPR assembly
2023-06-02 Dmitry Selyutinpower_insn: provide SVP64 assembly stub
2023-06-02 Dmitry Selyutinpower_insn: discard overlaps for dynamic operands
2023-06-02 Dmitry Selyutinpower_insn: fix DOperandDX span
2023-06-02 Dmitry Selyutinpower_insn: fix XO static operand
2023-06-02 Dmitry Selyutinpower_insn: hide records repr from operands
2023-06-02 Dmitry Selyutinpower_insn: sort opcodes by sections
2023-06-02 Dmitry Selyutinpower_insn: fix repr for opcode mask and value
2023-06-02 Dmitry Selyutinpower_insn: support tables priorities
2023-06-02 Dmitry Selyutinpower_insn: provide operands helpers
2023-06-02 Dmitry Selyutinpower_insn: cache operands
2023-06-02 Dmitry Selyutinpower_insn: deprecate operand record argument
2023-06-02 Dmitry Selyutinpower_insn: simplify word instruction assembly
2023-06-02 Dmitry Selyutinpower_insn: introduce PO and XO static operands
2023-06-02 Dmitry Selyutinpower_insn: introduce record operands helpers
2023-06-02 Dmitry Selyutinpower_insn: convert spans into properties
2023-06-02 Dmitry Selyutinpower_insn: bind records to operands
2023-06-02 Dmitry Selyutinpower_insn: postpone operands initialization
2023-06-02 Dmitry Selyutinpower_insn: ensure operands are always dataclasses
2023-06-02 Dmitry Selyutinpower_insn: return None for unknown insn names
2023-06-02 Dmitry Selyutinpower_insn: introduce signed immediate operand class
2023-06-02 Dmitry Selyutinpower_insn: rename register operand class
2023-06-02 Dmitry Selyutinpower_insn: clean and simplify EXTS operands
2023-06-02 Dmitry Selyutinpower_insn: support FPR operands assembly
2023-06-02 Dmitry Selyutinpower_insn: support GPR operands
2023-06-02 Dmitry Selyutinpower_insn: support non-zero operands
2023-06-02 Dmitry Selyutinpower_insn: allow sign only for SignedOperand
2023-06-02 Dmitry Selyutinpower_insn: add support for a trivial assembly
2023-06-02 Dmitry Selyutinpower_insn: really skip sv. entries for PPC database
2023-06-02 Dmitry Selyutinpower_insn: skip sv. instructions in PPC database
2023-06-02 Dmitry Selyutinpower_insn: fix AA match
2023-06-02 Dmitry Selyutinpower_insn: do not allow default records
2022-10-11 Luke Kenneth Casso... add /pi to sv/trans/svp64.py and power_insns.py
2022-10-08 Luke Kenneth Casso... drat
2022-10-08 Luke Kenneth Casso... add sc and scv support after moving from major.csv...
2022-10-08 Luke Kenneth Casso... separate out DQ and DS to separate custom_immediates
2022-10-08 Luke Kenneth Casso... use new base-class EXTSOperand, derive from ImmediateOp...
2022-10-08 Luke Kenneth Casso... convert TargetAddrOperand to base class EXTSOperand
2022-10-06 Luke Kenneth Casso... add PredicateBaseRM decode to CR Ops Simple mode as...
2022-10-06 Luke Kenneth Casso... whoops must only be PredicateBaseRM in CROpFF5RM
2022-10-06 Luke Kenneth Casso... add sv.cmp (ffirst-5) decode/encode asm support
2022-09-25 Dmitry Selyutinpower_insn: always provide els for ld/st idx stride
2022-09-25 Dmitry Selyutinpower_insn: fix and unify /vli specifier
2022-09-24 Dmitry Selyutinpower_insn: support SEA specifier
2022-09-24 Dmitry Selyutinpower_insn: slightly change table checking style
2022-09-24 Luke Kenneth Casso... whoops got mask/match test wrong in power_insn.py
2022-09-24 Dmitry Selyutinpower_insn: reorder mode tables to match the spec
2022-09-24 Dmitry Selyutinpower_insn: rename smr to mr
2022-09-24 Dmitry Selyutinpower_insn: provide Record.Rc field
2022-09-24 Dmitry Selyutinpower_insn: simplify rsvd naming; drop unused rsvd
2022-09-24 Dmitry Selyutinpower_insn: replace Record.function with Record.mode
2022-09-24 Dmitry Selyutinpower_insn: sort database finally
2022-09-24 Dmitry Selyutinpower_insn: provide missing cr_in2 properties
2022-09-24 Dmitry Selyutinpower_fields: restore class-oriented traversal
2022-09-23 Luke Kenneth Casso... whoops consistent inversion of inv,CRbit was CRbit,inv
2022-09-20 Dmitry Selyutinpower_insn: unify predicates
2022-09-20 Dmitry Selyutinpower_insn: support vli specifier
2022-09-20 Dmitry Selyutinpower_insn: simplify specifiers sorting
2022-09-20 Luke Kenneth Casso... sort specifiers in pysvp64dis in lexicographical order
2022-09-20 Dmitry Selyutinpower_insn: custom sz handling for branches
2022-09-20 Dmitry Selyutinpower_insn: support vs/vsi/vsb/vsbi/ctr/cti specifiers
2022-09-20 Dmitry Selyutinpower_insn: support common branch disassembly
2022-09-19 Dmitry Selyutinpower_insn: simplify branch table
2022-09-19 Dmitry Selyutinpower_insn: provide SVL/CTR branch fields
2022-09-19 Dmitry Selyutinpower_insn: support els specifier
2022-09-19 Luke Kenneth Casso... whitespace
2022-09-18 Dmitry Selyutinpower_insn: perform cleanup; turn comments into docstrings
2022-09-18 Luke Kenneth Casso... code-comments identifying tables
2022-09-18 Luke Kenneth Casso... simplify predicate mask reporting. assign dw=sw=mask...
2022-09-18 Luke Kenneth Casso... use widths.get(dw/sw) and test empty/non-empty after.
2022-09-18 Luke Kenneth Casso... fix predicate mask case when smask was zero but mmode...
2022-09-18 Luke Kenneth Casso... no, better than hack-job, stop CROpSimpleRM deriving...
2022-09-18 Luke Kenneth Casso... bit of a hack-job, a base class MRBaseRM - MapReduce...
2022-09-18 Luke Kenneth Casso... correct COopFF3RM and CRopSimpleRM: extra sz field...
2022-09-18 Dmitry Selyutinpower_insn: introduce common mr/mrr RM class
2022-09-18 Dmitry Selyutinpower_insn: support ff/pr predicates
2022-09-18 Dmitry Selyutinpower_insn: fix CR ops classes naming
2022-09-18 Dmitry Selyutinpower_insn: fix coding style
2022-09-18 Dmitry Selyutinpower_insn: introduce common dz/sz RM classes
2022-09-18 Dmitry Selyutinpower_insn: introduce common zz RM class
2022-09-18 Dmitry Selyutinpower_insn: introduce common Sat RM class
2022-09-18 Dmitry Selyutinpower_insn: introduce common FFPRRc0 RM class
2022-09-18 Dmitry Selyutinpower_insn: simplify RM classes naming
2022-09-18 Luke Kenneth Casso... sigh, check length of string returned, if non-zero...
2022-09-18 Luke Kenneth Casso... sort out CR RM Mode (sz/dz bits moved, consistent)
2022-09-18 Luke Kenneth Casso... add comments (links to URLs) into power_insns.py for...
2022-09-18 Luke Kenneth Casso... remove f"" use simpler code, easier to read
2022-09-18 Dmitry Selyutinpower_insn: fix Rc operand accessor
2022-09-18 Dmitry Selyutinpower_insn: support RC1/~RC1 in ff/pr
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