power_insn: fix Rc operand accessor
[openpower-isa.git] / src / openpower / decoder / power_insn.py
2022-09-18 Dmitry Selyutinpower_insn: fix Rc operand accessor
2022-09-18 Dmitry Selyutinpower_insn: support RC1/~RC1 in ff/pr
2022-09-18 Luke Kenneth Casso... comment principle behind new tables in power_insn.py
2022-09-18 Luke Kenneth Casso... redo branch mode as a table, in power_insn.py
2022-09-18 Dmitry Selyutinpower_insn: adjust table comments
2022-09-18 Dmitry Selyutinpower_insn: another minor ld/st imm table cleanup
2022-09-18 Dmitry Selyutinpower_insn: minor CR cleanup
2022-09-18 Dmitry Selyutinpower_insn: minor cleanup
2022-09-18 Luke Kenneth Casso... code-morph CR ops to table in power_insn.py
2022-09-18 Luke Kenneth Casso... code-morph in power_insn.py - move table-search to...
2022-09-18 Luke Kenneth Casso... LDST_IDX Mode converted to table
2022-09-18 Dmitry Selyutinpower_insn: support m/sm/dm specifiers
2022-09-18 Dmitry Selyutinpower_insn: pass record to specifiers
2022-09-18 Luke Kenneth Casso... replace LDST_IMM mode with mask/value match table in...
2022-09-18 Luke Kenneth Casso... remove (invalid) NormalSaturationExtRM mode from power_...
2022-09-18 Luke Kenneth Casso... reduce NORMAL svp64 mode down to a mask-value search
2022-09-18 Luke Kenneth Casso... remove subvector mode from power_insn.py
2022-09-18 Dmitry Selyutinpower_insn: support mrr specifier
2022-09-18 Dmitry Selyutinpower_insn: support svm specifier
2022-09-18 Dmitry Selyutinpower_insn: sync RM modes
2022-09-18 Dmitry Selyutinpower_insn: support w/dw/sw specifiers
2022-09-18 Dmitry Selyutinpower_insn: decouple branch modes
2022-09-18 Dmitry Selyutinpower_insn: decouple cr_op modes
2022-09-18 Dmitry Selyutinpower_insn: support sw specifier
2022-09-18 Dmitry Selyutinpower_insn: decouple common normal and ld/st RM
2022-09-18 Dmitry Selyutinpower_insn: support ew specifier
2022-09-18 Dmitry Selyutinpower_insn: simplify subvl disassembly
2022-09-17 Dmitry Selyutinpower_insn: fix sat checks
2022-09-17 Dmitry Selyutinpower_fields: fix mapping class accessor
2022-09-17 Dmitry Selyutinpower_insn: fix zz specifiers
2022-09-17 Dmitry Selyutinpower_insn: decouple base ld/st idx RM
2022-09-17 Dmitry Selyutinpower_insn: decouple base ld/st imm RM
2022-09-17 Dmitry Selyutinpower_insn: decouple base normal RM
2022-09-17 Dmitry Selyutinpower_insn: support saturation mode
2022-09-17 Dmitry Selyutinpower_insn: support dz/sz specifiers
2022-09-17 Luke Kenneth Casso... add MASK_SRC to power_insn.py (SVmask_src from enums)
2022-09-17 Luke Kenneth Casso... remove pack/unpack modes from power_insn.py, they no...
2022-09-17 Dmitry Selyutinpower_insn: support vec2/vec3/vec4
2022-09-17 Dmitry Selyutinpower_insn: support specifiers
2022-09-17 Dmitry Selyutinpower_insn: refactor and fix RM mappings
2022-09-17 Dmitry Selyutinpower_insn: drop redundant table
2022-09-16 Dmitry Selyutinpower_insn: postpone updating per-instruction operands
2022-09-15 Dmitry Selyutinpower_insn: perform faster PPC database lookups
2022-09-15 Dmitry Selyutinpower_insn: support instruction bytes conversion
2022-09-15 Dmitry Selyutinpower_insn: allow accessing instruction bits
2022-09-13 Dmitry Selyutinpower_insn: support signed operands
2022-09-13 Dmitry Selyutinpower_insn: support branch RM
2022-09-13 Dmitry Selyutinpower_insn: support CR RM
2022-09-13 Dmitry Selyutinpower_insn: refactor RM mapping
2022-09-12 Dmitry Selyutinpower_insn: refactor RM mapping
2022-09-12 Dmitry Selyutinpower_insn: call sv_spec_leave unconditionally
2022-09-12 Dmitry Selyutinpower_insn: fix RCOE check
2022-09-12 Dmitry Selyutinpower_insn: introduce pseudo cr_in2
2022-09-12 Dmitry Selyutinpower_insn: fix typo
2022-09-12 Dmitry Selyutinpower_insn: support BRANCH and CR mode stubs
2022-09-12 Dmitry Selyutinpower_insn: refactor register operands
2022-09-11 Dmitry Selyutinpower_insn: check exact matches directly in set
2022-09-11 Dmitry Selyutinpower_insn: group opcodes and names
2022-09-11 Luke Kenneth Casso... whoops lsbshf=2 for CR5
2022-09-11 Luke Kenneth Casso... whoops missed lsb-shift parameter
2022-09-11 Luke Kenneth Casso... add comments into CR5Operand class
2022-09-11 Luke Kenneth Casso... add CR5Operand and CR3Operand to power_insns.py
2022-09-10 Dmitry Selyutinpower_insn: perform minor opcodes cleanup
2022-09-10 Dmitry Selyutinpower_insn: hopefully final take on the opcodes
2022-09-10 Dmitry Selyutinpower_insn: yet another take on the opcodes
2022-09-10 Dmitry Selyutinpower_insn: refactor register verbose assembly
2022-09-10 Dmitry Selyutinpower_insn: support pcode
2022-09-10 Dmitry Selyutinpower_insn: tune TargetAddrOperand disassembly
2022-09-10 Dmitry Selyutinpower_insn: support CR remap
2022-09-10 Dmitry Selyutinpower_insn: support non-zero operands
2022-09-10 Dmitry Selyutinpower_insn: simplify operand naming conventions
2022-09-10 Dmitry Selyutinpower_insn: drop redundant dataclass incantations
2022-09-10 Dmitry Selyutinpower_insn: do not print blob suffix unless needed
2022-09-10 Dmitry Selyutinpower_insn: do not panic upon database query
2022-09-10 Dmitry Selyutinpower_insn: refactor opcode matching
2022-09-10 Dmitry Selyutinpower_insn: support D operand in DX form
2022-09-10 Dmitry Selyutinpower_insn: refactor span detection
2022-09-10 Dmitry Selyutinpower_insn: simplify code
2022-09-10 Dmitry Selyutinpower_insn: remove redundant code
2022-09-10 Dmitry Selyutinpower_insn: decouple extra merge routine
2022-09-10 Dmitry Selyutinpower_insn: rename extra to spec
2022-09-10 Dmitry Selyutinpower_insn: deprecate redundant else section
2022-09-10 Dmitry Selyutinpower_insn: rename Extra classes
2022-09-09 Dmitry Selyutinpower_insn: support verbosity levels
2022-09-09 Dmitry Selyutinpower_insn: indent refactoring
2022-09-09 Luke Kenneth Casso... extend short down into rest of disassembly
2022-09-09 Luke Kenneth Casso... add "short" form of instruction - not output hex-encoding
2022-09-07 Dmitry Selyutinpower_insn: dump operand type (scalar/vector)
2022-09-07 Dmitry Selyutinpower_insn: fix immediate operands
2022-09-07 Dmitry Selyutinpower_insn: refactor operands disassembly
2022-09-07 Dmitry Selyutinpower_insn: support EXTRA2/EXTRA3 GPR/FPR
2022-09-06 Dmitry Selyutinpower_insn: use tuple for bit ranges in fields
2022-09-06 Dmitry Selyutinpower_insn: fix naming conventions
2022-09-06 Dmitry Selyutinpower_insn: stricter reg type check
2022-09-06 Dmitry Selyutinpower_insn: rename value argument to insn in operands
2022-09-06 Dmitry Selyutinpower_insn: support branch stub
2022-09-06 Dmitry Selyutinpower_insn: clean extra disassembly
2022-09-06 Dmitry Selyutinpower_insn: disassemble extra index
2022-09-06 Dmitry Selyutinpower_insn: support extra_reg routine
2022-09-06 Dmitry Selyutinpower_insn: move extras to SVP64Record
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