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move ffadds to not conflict with fptrans -- makes space for min/max/fmod/remainder ops
[openpower-isa.git]
/
src
/
openpower
/
decoder
/
test
/
pysim.py
2022-08-25
Jacob Lifshay
allow crtl tests to run in parallel
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2021-12-26
Mikolaj Wielgus
Give human-readable names to slots, run functions and...
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2021-12-25
Mikolaj Wielgus
Put CRTL CFFI modules in crtl dir
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2021-12-23
Luke Kenneth Casso...
code cleanup / comments
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2021-12-23
Luke Kenneth Casso...
bit of a tidyup of crtl:
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2021-12-23
Mikolaj Wielgus
Give unique names to CRTL-generated modules
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2021-12-23
Mikolaj Wielgus
Move "pending" set to C
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2021-12-22
Mikolaj Wielgus
Make _PySignalState CRTL-aware
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2021-12-08
Luke Kenneth Casso...
absolute import again
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2021-12-08
Mikolaj Wielgus
WIP: Output C instead of Python for Nmigen simulation
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2021-12-08
Mikolaj Wielgus
Source Nmigen simulator from this repository
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