add fsubs unit test
[openpower-isa.git] / src / openpower / decoder /
2021-09-23 Luke Kenneth Casso... add fsubs unit test
2021-09-22 Luke Kenneth Casso... take a copy of SPRs so they are not modified by ISACaller
2021-09-22 Luke Kenneth Casso... split out function which processes initial test memory...
2021-09-17 Jacob Lifshayadd mock power-instruction-analyzer implementation...
2021-09-17 Jacob Lifshayfix test_caller_bcd_full.py not actually running correc...
2021-09-17 Jacob Lifshayadd test_caller_bcd_full.py to fully test all edge...
2021-09-16 Luke Kenneth Casso... bit of a mess, got a working check against static Expec...
2021-09-16 klehmananother yield excursion
2021-09-16 klehmanshift__rot_caller change to use expected state
2021-09-15 klehmanyield from in unit test
2021-09-07 klehmanadded assertion to regression_rlwnm
2021-09-07 Jacob Lifshayclean up test_caller_bcd.py
2021-09-07 Jacob Lifshayadd missing items to .gitignore
2021-09-07 Luke Kenneth Casso... removed duplicate function and unneeded modules
2021-09-07 klehmanFixed typo for sraw test
2021-09-07 klehmanInitial commit for shift/rotate caller
2021-09-03 Dmitry Selyutintest_caller_bcd: switch to test_runner module
2021-09-03 Dmitry Selyutintest_runner: support custom pdecode2 instances
2021-09-04 Luke Kenneth Casso... split out ISATestRunner to separate module
2021-09-04 Luke Kenneth Casso... redo SVP64 RM Decode to new CTR-Test Mode (svstep not...
2021-08-30 Luke Kenneth Casso... quite a big intrusive change in auto-assignment
2021-08-30 Luke Kenneth Casso... assignment test pattern-matching not adequate, adding...
2021-08-30 Luke Kenneth Casso... fix RANGE function, reverse direction needed
2021-08-30 Luke Kenneth Casso... also add pattern-recognition for just
2021-08-30 Luke Kenneth Casso... fix pattern-match for an expression such as "XLEN-16...
2021-08-29 Dmitry Selyutinpywriter: support RANGE helper
2021-08-22 Dmitry Selyutinparser: support unary minus properly
2021-08-22 Dmitry Selyutinlexer: t_NUMBER should not grab minus sign
2021-08-22 Luke Kenneth Casso... add another quick test to pseudo parser
2021-08-21 Luke Kenneth Casso... set XLEN=64 in ISACaller
2021-08-19 Dmitry Selyutintest_caller_bcd: make bit changes more VHDL-like
2021-08-19 Dmitry Selyutintest_caller_bcd: fix and refactor addg6s test loop
2021-08-19 Dmitry Selyutintest_caller_bcd: drop dead code
2021-08-19 Dmitry Selyutintest_caller_bcd: mention reference implementation
2021-08-19 Dmitry Selyutintest_caller_bcd: refactor addg6s test
2021-08-19 Luke Kenneth Casso... whitespace, below 80 char limit
2021-08-18 Dmitry Selyutintest_caller_bcd: mark addg6s test as slowpoke
2021-08-18 Dmitry Selyutintest_caller_bcd: addg6s sketch
2021-08-17 Dmitry Selyutintest_caller_bcd: align tables with spec and cases
2021-08-17 Dmitry Selyutintest_caller_bcd: drop temporary code
2021-08-15 Luke Kenneth Casso... add subTest back in to bcd tst
2021-08-15 Luke Kenneth Casso... whitespace (keep below 80 chars)
2021-08-15 Luke Kenneth Casso... whitespace (below 80 chars)
2021-08-15 Luke Kenneth Casso... take copy of GPR/FPR inputs into ISACaller
2021-08-15 Luke Kenneth Casso... allow constructor of SelectableInt to pass in (and...
2021-08-15 Dmitry Selyutintest_caller_bcd: basic batch mode support
2021-08-15 Luke Kenneth Casso... no python files to be committed in isafunctions
2021-08-15 Luke Kenneth Casso... add a quick logic test of astor tree-dump
2021-08-15 Luke Kenneth Casso... sv.bc test jumping to wrong location (offset 0xc not...
2021-08-14 Luke Kenneth Casso... create an end loop condition which tells the sv.bc...
2021-08-14 Luke Kenneth Casso... end loop condition in svp64 bc pseudo-code
2021-08-14 Luke Kenneth Casso... fix test_caller_svp64.py, particularly indexed LD/ST,
2021-08-14 Luke Kenneth Casso... messy resolution of sv.bc testing, early-out detection.
2021-08-12 Luke Kenneth Casso... add TODO comments for BCD test speedup
2021-08-12 Luke Kenneth Casso... add ctr_ok and cond_ok to namespace to be able
2021-08-11 Luke Kenneth Casso... use subTest in BCD test
2021-08-11 Luke Kenneth Casso... get new ISATestCaller set up with correct function...
2021-08-11 Luke Kenneth Casso... make only one PowerDecoder2, share it with
2021-08-11 Luke Kenneth Casso... whoops test for sv.bc* matched accidentally, use explic...
2021-08-11 Luke Kenneth Casso... redirect sv.bc to new svbranch in ISACaller
2021-08-11 Luke Kenneth Casso... corrections to SVP64 Branch Conditional
2021-08-11 Luke Kenneth Casso... rename TestRunner class to ISATestRunner
2021-08-11 Luke Kenneth Casso... add (untested) TestRunner based on soc test_runner.py
2021-08-11 Dmitry Selyutintest_caller_bcd: cdtbcd
2021-08-10 Dmitry Selyutintest_caller_bcd: cbcdtd test
2021-08-10 Dmitry Selyutinpywriter: move BCD/DPD routines to header
2021-08-10 Luke Kenneth Casso... add dct butterfly SVG autogenerator
2021-08-10 Luke Kenneth Casso... corrections to SVP64 Branch RM Mode decoding
2021-08-08 Luke Kenneth Casso... add SVP64 Branch-Conditional decoding
2021-08-08 Luke Kenneth Casso... adding some testing of fragment-printing into PowerDecoder
2021-08-05 Luke Kenneth Casso... start adding Branch-Conditional decoding to SVP64RMMode...
2021-08-02 Luke Kenneth Casso... add inverse DCT in-place unit test with bit-reversed...
2021-08-01 Luke Kenneth Casso... bit of a big update, remove all bit-reversed LD operati...
2021-08-01 Luke Kenneth Casso... add LD-half-swap for i-DCT which does not work. redesig...
2021-07-31 Dmitry Selyutinpywriter: BCD helpers
2021-07-31 Luke Kenneth Casso... remove hand-created DOUBLE function, now it is replaced...
2021-07-31 Luke Kenneth Casso... replace DOUBLE function from helpers.py with pseudocode...
2021-07-31 Luke Kenneth Casso... whoops, no ability to add comments in between functions...
2021-07-31 Luke Kenneth Casso... add outer-inner RADIX2 iDCT unit test.
2021-07-31 Luke Kenneth Casso... add SVP64 i-DCT unit test for inner butterfly, coeffici...
2021-07-31 Luke Kenneth Casso... add i-DCT SVP64 unit test for outer butterfly
2021-07-31 Luke Kenneth Casso... corrections to iDCT demo printout
2021-07-30 Luke Kenneth Casso... got i-DCT yield schedule operational in fastdctlee...
2021-07-30 Luke Kenneth Casso... start adding i-dct schedule with debug-print, hard...
2021-07-29 Luke Kenneth Casso... random experimentation landed eventually on a "pass...
2021-07-29 Luke Kenneth Casso... use coefficient table in iDCT
2021-07-29 Luke Kenneth Casso... move half-reverse to before outer butterfly in I-DCT
2021-07-29 Luke Kenneth Casso... get byte-swapping functional in inverse-dct proof-of...
2021-07-29 Luke Kenneth Casso... sigh, I-DCT had to reverse the order of middle loop...
2021-07-29 Luke Kenneth Casso... start on inverse dct, turning recursive to iterative
2021-07-28 Luke Kenneth Casso... start on inverse DCT, transforming to iterative
2021-07-28 Luke Kenneth Casso... got DCT LD-bit-rev demo operational in unit test
2021-07-28 Luke Kenneth Casso... fix LD/ST bitreverse with Matrix REMAP to instead be...
2021-07-28 Luke Kenneth Casso... argh, have LD-bitreverse select the offset from RA...
2021-07-28 Luke Kenneth Casso... add mode for half-swap, to be combined with LD-bit...
2021-07-28 Luke Kenneth Casso... code comments
2021-07-27 Luke Kenneth Casso... fix test_power_decoder.py
2021-07-27 Luke Kenneth Casso... get DCT shortened table operational
2021-07-27 Dmitry Selyutinpower_enums: cbcdtd instruction
2021-07-27 Dmitry Selyutinpower_enums: cdtbcd instruction
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