temporary hack-revert, the original is now in branch "paths"
[openpower-isa.git] / src / openpower / decoder /
2023-06-07 Luke Kenneth Casso... comment out debug log
2023-06-07 Luke Kenneth Casso... remove print log
2023-06-05 Dmitry Selyutinpower_enums: distinguish all reg types
2023-06-04 Dmitry Selyutinpower_enums: simplify sel type string conversion
2023-06-04 Dmitry Selyutinpower_enums: simplify extra idx string conversion
2023-06-04 Dmitry Selyutinpower_enums: align reg pairs
2023-06-04 Dmitry Selyutinpower_enums: simplify reg string conversion
2023-06-04 Dmitry Selyutinpower_enums: simplify selectors string conversion
2023-06-03 Luke Kenneth Casso... rename "none" __repr__ to "NONE" in SVExtra and SelType
2023-06-03 Dmitry Selyutininsndb: rename types into core
2023-06-03 Dmitry Selyutininsndb: revert recent renaming
2023-06-03 Luke Kenneth Casso... using names of modules that are identical to commonly...
2023-06-02 Dmitry Selyutinpysvp64asm: integrate into insndb
2023-06-02 Dmitry Selyutinpower_insn: decouple into separate module
2023-06-01 Dmitry Selyutinpower_insn: disassemble RA0 and RT0 correctly
2023-06-01 Dmitry Selyutinpower_insn: forbid r0 for RA0 and RT0
2023-06-01 Dmitry Selyutinpower_enums: introduce Reg pair property
2023-06-01 Dmitry Selyutinpower_enums: introduce Reg or_zero property
2023-06-01 Dmitry Selyutinpower_insn: drop unused import
2023-06-01 Dmitry Selyutinpower_enums: deprecate SVExtraReg
2023-06-01 Dmitry Selyutinpower_insn: switch to Reg
2023-06-01 Dmitry Selyutinpower_enums: introduce Reg as alias of SVExtraReg
2023-06-01 Dmitry Selyutinpower_insn: guess extra from reg instead of sel
2023-06-01 Dmitry Selyutinpower_enums: provide selector type property
2023-06-01 Dmitry Selyutinpower_enums: deprecate SVExtraRegType
2023-06-01 Dmitry Selyutinpower_insn: switch to SelType
2023-06-01 Dmitry Selyutinpower_enums: introduce SelType as alias of SVExtraRegType
2023-06-01 Dmitry Selyutinpower_insn: completely refactor extras
2023-06-01 Dmitry Selyutinpower_enums: introduce register aliases
2023-06-01 Dmitry Selyutinpower_insn: introduce extras property
2023-06-01 Dmitry Selyutinpower_enums: change SVExtra representation
2023-06-01 Luke Kenneth Casso... far too much memory (58 GB) being used by these unit...
2023-06-01 Luke Kenneth Casso... disable fmv-fcvt tests entirely
2023-05-31 Jacob Lifshayuse raise_syntax_error for `IndentationError`s as well
2023-05-14 Dmitry Selyutinpower_insn: fix broken extra_idx
2023-05-14 Dmitry Selyutinpower_enums: fix incorrect naming
2023-05-27 Luke Kenneth Casso... add P2M type - 1P 2P 2PM needed for new LD/ST-Indexed...
2023-05-27 Luke Kenneth Casso... https://bugs.libre-soc.org/show_bug.cgi?id=1091
2023-05-24 Luke Kenneth Casso... note on FP Exception about DDFF VLi=0/1
2023-05-24 Jacob LifshayISACaller: generate FP trap
2023-05-24 Jacob Lifshayadd support for adding extra uninit_regs from html...
2023-05-22 Luke Kenneth Casso... yet another namespace hack now that @inject is on
2023-05-22 Luke Kenneth Casso... make style of power_fields.py consistent with standard...
2023-05-21 Luke Kenneth Casso... eurrrgh, hack in a namespace dict now that @inject...
2023-05-21 Luke Kenneth Casso... add /pi to LD/ST, temporarily. lose dz/sz replace with...
2023-05-21 Luke Kenneth Casso... big set of updates to LD/ST in line with new spec changes
2023-05-21 Luke Kenneth Casso... hack-add @inject() into pyfnwriter, also take the
2023-05-21 Luke Kenneth Casso... explicitly update FPSCR from list of return results
2023-05-21 Luke Kenneth Casso... code-comment spelling
2023-05-21 Luke Kenneth Casso... FPSCR should never have been added to "bypass" the...
2023-05-19 Jacob Lifshaycompute CR1 for non-compare fp Rc=1 instructions
2023-05-19 Jacob Lifshaysupport binary literals with embedded _ (e.g. 0b10_01)
2023-05-19 Jacob Lifshayparallelize fmv/fcvt unit tests
2023-05-18 Jacob Lifshayfix CR0 output for fmvtg*/fcvttg*
2023-05-17 Luke Kenneth Casso... small whitespace cleanup
2023-05-17 Luke Kenneth Casso... update the tables in power_svp64_rm.py
2023-05-17 Luke Kenneth Casso... sorted SVP64RMModeDecode to properly match the new...
2023-05-17 Jacob Lifshayadd fp value to BFPState.__repr__
2023-05-16 Luke Kenneth Casso... replace self.insnlog.append with self.trace function
2023-05-16 Luke Kenneth Casso... whoops no self.record, must be record argument
2023-05-15 Luke Kenneth Casso... skip reading ewsrc when SVMode is CROP
2023-05-15 Luke Kenneth Casso... sort out sv.cmp zz (and correct unit tests)
2023-05-15 Luke Kenneth Casso... CROpFF3RM and CROpFF5RM were swapped round.
2023-05-15 Luke Kenneth Casso... found the location to cut/paste the disassembly extra...
2023-05-15 Luke Kenneth Casso... RC1 does not exist in CROps, the selection of behaviour...
2023-05-15 Luke Kenneth Casso... fix empty slot in EXTRA
2023-05-15 Luke Kenneth Casso... ld/st mismatch in power_insn.py and sv_analysis.py
2023-05-15 Luke Kenneth Casso... move RG bit in CRops to Mode[2] from Mode[3] MSB0-numbering
2023-05-15 Luke Kenneth Casso... got linked-list-pointer-chasing working
2023-05-15 Luke Kenneth Casso... bug in power_insn.py where record.svp64 is None (??)
2023-05-15 Luke Kenneth Casso... have to now add LD/ST-update instructions to list of...
2023-05-15 Luke Kenneth Casso... prevent duplicate EXTRA2/3 in power_insndb when assembl...
2023-05-14 Dmitry Selyutinpower_insn: filter out empty pcode lines
2023-05-14 Dmitry Selyutinpower_insn: fix verbose assembly extra info
2023-05-14 Luke Kenneth Casso... attempting to get LD/ST-Update SVP64 EXTRA3 working...
2023-05-13 Jacob Lifshayadd rest of bfp_* helpers needed to run fcvt js test
2023-05-13 Jacob Lifshaypow should not become self.pow
2023-05-12 Luke Kenneth Casso... check expected CR fields in Data-Dependent Fail-First
2023-05-12 Jacob Lifshaymake truediv available to pseudocode
2023-05-12 Jacob Lifshayadd bfp classification predicates
2023-05-12 Jacob Lifshayallow assigning BFPState and SelectableMSB0Fraction...
2023-05-12 Jacob Lifshayadd support for *_flag global variables needed by bfp_...
2023-05-12 Jacob Lifshaymake lexer replace class with class_ since it's a pytho...
2023-05-12 Jacob Lifshayfix SelectableMSB0Fraction's constructor
2023-05-12 Jacob LifshayRevert "add stub reset_xflags function"
2023-05-11 Luke Kenneth Casso... corrections to dd-ffirst tests when VLi=0, the write...
2023-05-11 Jacob LifshaySelectableMSB0Fraction is now basically complete and...
2023-05-10 Luke Kenneth Casso... add very very very basic write-out of instruction log
2023-05-10 Jacob LifshayMerge branch 'support-fields'
2023-05-10 Luke Kenneth Casso... add ld/st data-dependent fail-first /vli (inclusive)
2023-05-10 Luke Kenneth Casso... fix data-dependent fail-first on load
2023-05-10 Dmitry Selyutinpower_insn: remove redundant logs
2023-05-10 Luke Kenneth Casso... extend previous hard-coded magic constant (256) used...
2023-05-10 Jacob Lifshayadd WIP fp_working_format.py
2023-05-10 Jacob Lifshaychange FPSCR to a required parameter of ISACallerHelper support-fields
2023-05-10 Jacob LifshayRevert "remove now-unnecessary SO global, since XER...
2023-05-10 Jacob Lifshayswitch to using self.FPSCR
2023-05-10 Jacob Lifshayswitch to using FPSCRState for double2single.mdwn
2023-05-10 Jacob Lifshayadd self.FPSCR
2023-05-10 Jacob Lifshayremove now-unnecessary SO global, since XER[SO] syntax...
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