2022-08-29 |
Dmitry Selyutin | pysvp64dis: introduce Prefix and RM classes |
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2022-08-29 |
Dmitry Selyutin | pysvp64dis: dump to output file; use explicit arguments |
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2022-08-29 |
Dmitry Selyutin | pysvp64dis: refactor classes; use fields helpers |
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2022-08-29 |
Dmitry Selyutin | pysvp64dis: fix prefix/suffix properties |
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2022-08-29 |
Dmitry Selyutin | pysvp64asm: uncomment the remapped instructions |
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2022-08-29 |
Luke Kenneth Casso... | Revert "support assembling svp64 instructions with... |
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2022-08-29 |
Luke Kenneth Casso... | add two instructions demoing broken commit 0e80cab3b809d43 |
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2022-08-29 |
Jacob Lifshay | support assembling svp64 instructions with custom suffi... |
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2022-08-26 |
Luke Kenneth Casso... | code-shuffle on if/elif/nots in sv/trans/svp64.py |
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2022-08-26 |
Jacob Lifshay | add original instruction as a comment, improving debugg... |
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2022-08-26 |
Jacob Lifshay | add support for comments in instructions |
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2022-08-26 |
Jacob Lifshay | include original svp64 instruction in comment on prefix |
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2022-08-26 |
Jacob Lifshay | fix typo |
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2022-08-26 |
Luke Kenneth Casso... | update comments |
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2022-08-25 |
Jacob Lifshay | fix assembling `sv.add.` |
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2022-08-25 |
Jacob Lifshay | format .../trans/svp64.py |
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2022-08-24 |
Luke Kenneth Casso... | remove non-orthogonal ldst_shift |
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2022-08-24 |
Luke Kenneth Casso... | fix annoying typo, comment-out asm_process() |
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2022-08-24 |
Luke Kenneth Casso... | ha ha very funny, sv.andi does not exist, only "sv... |
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2022-08-24 |
Jacob Lifshay | fix translation of instructions that require Rc=True... |
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2022-08-16 |
Dmitry Selyutin | pysvp64dis: rename the script due to name conflicts |
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2022-08-15 |
Dmitry Selyutin | pysvp64dis: switch to SelectableInt class |
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2022-08-15 |
Dmitry Selyutin | pysvp64dis: introduce disassembler script |
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2022-07-27 |
Luke Kenneth Casso... | add extra fmvis to see what is going on |
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2022-07-27 |
Konstantinos Marga... | Fix fmvis & fishmv bit handling for d0, add tests for... |
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2022-07-27 |
Konstantinos Marga... | Add fishmv instruction (bug #887) |
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2022-07-27 |
Konstantinos Marga... | fix wrong shift in fmvis, use correct immediates in... |
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2022-07-26 |
Luke Kenneth Casso... | add some more example fmvis to work out which is LSB... |
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2022-07-26 |
Luke Kenneth Casso... | add example fmvis instruction to trans/svp64.py |
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2022-07-26 |
Luke Kenneth Casso... | annoying. DX-Form is one exception to the rule of havin... |
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2022-07-26 |
Konstantinos Marga... | fix fmvis decoder, it's now a 2-operand instruction |
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2022-07-26 |
Konstantinos Marga... | Add fmvis instruction + tests, bug #887 |
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2022-07-25 |
Dmitry Selyutin | svp64.py: fix alignment |
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2022-07-25 |
Dmitry Selyutin | svp64.py: update svindex operands |
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2022-07-12 |
Luke Kenneth Casso... | add recognition of 0xNNN and 0bMMMM to sv/trans/svp64.py |
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2022-07-11 |
Andrey Miroshnikov | Added insn initialisation for grev() func |
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2022-07-06 |
Dmitry Selyutin | svp64.py: allow macros as register names |
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2022-07-05 |
Luke Kenneth Casso... | convert test_caller_setvl.py to new vector numbering... |
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2022-07-05 |
Luke Kenneth Casso... | add "*%" and "*" vector-numbering convention |
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2022-07-05 |
Luke Kenneth Casso... | add note about bug #884 new reg vector naming convention |
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2022-06-28 |
Luke Kenneth Casso... | add recognition of "sv." to pysvp64asm |
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2022-06-26 |
Luke Kenneth Casso... | whoops svp64.py testing wrong variable on sv.svstep |
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2022-06-26 |
Luke Kenneth Casso... | rename SVRM *field* to SVrm to avoid a name-clash with |
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2022-06-26 |
Dmitry Selyutin | svp64.py: decrement SVd operand |
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2022-06-26 |
Dmitry Selyutin | svp64.py: fix ignored field range |
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2022-06-26 |
Dmitry Selyutin | svp64.py: drop commented code |
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2022-06-26 |
Dmitry Selyutin | svp64.py: fix fsins/fcoss X-FORM |
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2022-06-26 |
Luke Kenneth Casso... | whitespace |
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2022-06-26 |
Luke Kenneth Casso... | svp64.py: sync SVRM-Form used for svshape |
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2022-06-26 |
Luke Kenneth Casso... | svp64.py: fix svshape and setvl plus couple of oddities |
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2022-06-26 |
Luke Kenneth Casso... | svp64.py: add -FORM headers to more functions |
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2022-06-26 |
Luke Kenneth Casso... | svp64.py: fix bmask entry |
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2022-06-26 |
Dmitry Selyutin | svp64.py: group 32-bit instructions into the table |
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2022-06-26 |
Dmitry Selyutin | svp64.py: align indentation |
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2022-06-24 |
Luke Kenneth Casso... | add svindex XO field 101001 |
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2022-06-24 |
Luke Kenneth Casso... | rename mask to rmm in svindex |
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2022-06-24 |
Dmitry Selyutin | svp64.py: support svindex instruction |
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2022-06-24 |
Luke Kenneth Casso... | correct bmask conversion to binary (wrong instruction... |
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2022-06-23 |
Andrey Miroshnikov | Added bmask, pywriter failing |
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2022-06-22 |
Luke Kenneth Casso... | add X-Form to svp64.py av opcode set |
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2022-06-22 |
Andrey Miroshnikov | Added cprop to caller, enums, svp64 |
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2022-06-20 |
Luke Kenneth Casso... | add absolute-signed-diff next to absolute-unsigned... |
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2022-06-20 |
Luke Kenneth Casso... | rename absadd[us] to absdac[ud] |
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2022-06-19 |
Luke Kenneth Casso... | add absadd (unsigned) DRAFT |
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2022-06-19 |
Luke Kenneth Casso... | add absolute-difference DRAFT |
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2022-06-19 |
Luke Kenneth Casso... | add average-add DRAFT pseudocode and CSV |
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2022-06-19 |
Luke Kenneth Casso... | add the rest of min/max DRAFT av opcodes |
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2022-06-19 |
Luke Kenneth Casso... | add maxs DRAFT instruction |
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2022-06-08 |
Dmitry Selyutin | svp64.py: simplify core script translation |
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2022-06-06 |
Dmitry Selyutin | svp64.py: fix stdin/stdout modus operandi |
tree | commitdiff |
2022-06-06 |
Dmitry Selyutin | svp64.py: switch print statements to logger |
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2022-05-26 |
Luke Kenneth Casso... | add preamble on reg field encoding |
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2022-05-26 |
Luke Kenneth Casso... | split out CR field encoding into function |
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2022-05-26 |
Luke Kenneth Casso... | add some code-comments to explain CR field svp64 EXTRA... |
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2022-05-26 |
Luke Kenneth Casso... | Revert "svp64.py: simplify CR sv_extra and field proces... |
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2022-05-26 |
Dmitry Selyutin | svp64.py: always put leading zeroes for prefix |
tree | commitdiff |
2022-05-26 |
Dmitry Selyutin | svp64.py: simplify CR sv_extra and field processing |
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2022-05-20 |
Luke Kenneth Casso... | bit of a mess being sorted out |
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2022-05-19 |
Dmitry Selyutin | temporarily revert opcode changes |
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2022-05-18 |
Dmitry Selyutin | svp64.py: sync remap opcode |
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2022-05-18 |
Dmitry Selyutin | svp64.py: sync svshape opcode |
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2022-05-10 |
Luke Kenneth Casso... | add SimpleV-Form SVL/SVM/SVRM to svp64.py |
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2022-05-10 |
Luke Kenneth Casso... | rename comments persistent bit on svremap |
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2022-05-09 |
Luke Kenneth Casso... | comments for setvl were the wrong bit-position |
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2022-05-09 |
Luke Kenneth Casso... | update comments on sv.svstep |
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2022-05-09 |
Luke Kenneth Casso... | remove sv.setvl but *not* sv.svstep |
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2022-05-09 |
Luke Kenneth Casso... | whitespace |
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2022-05-09 |
Luke Kenneth Casso... | Revert "remove appearance of supporting sv.setvl and... |
tree | commitdiff |
2022-05-08 |
Luke Kenneth Casso... | remove appearance of supporting sv.setvl and sv.svstep |
tree | commitdiff |
2022-05-08 |
Luke Kenneth Casso... | add code-comments explaining that setvl, svstep svremap... |
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2022-05-03 |
Jacob Lifshay | add Rc to ternlogi |
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2022-04-12 |
Luke Kenneth Casso... | add description of modes, copied from specs |
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2022-04-12 |
Luke Kenneth Casso... | add extra links to modes |
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2022-04-06 |
Luke Kenneth Casso... | clarify comments on EXTRA2 exceptions for encoding... |
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2022-01-18 |
Jacob Lifshay | grev[w][i][.] pseudo-code works |
tree | commitdiff |
2021-12-10 |
Jacob Lifshay | add ternlogi to SVP64Asm |
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2021-12-10 |
Jacob Lifshay | format code |
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2021-08-15 |
Luke Kenneth Casso... | sv.bc test jumping to wrong location (offset 0xc not... |
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2021-08-08 |
Luke Kenneth Casso... | whoops, test of SV.bc in wrong place |
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2021-08-08 |
Luke Kenneth Casso... | add start of SVP64ASM encoder for sv.bc and sv.bclr |
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