2022-08-29 |
Dmitry Selyutin | sv_binutils: remove unused imports |
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2022-08-29 |
Dmitry Selyutin | sv_binutils: generate instruction getters/setters |
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2022-08-29 |
Dmitry Selyutin | sv_binutils: perform massive refactoring |
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2022-08-29 |
Dmitry Selyutin | sv_binutils: deprecate obsolete fields |
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2022-08-29 |
Dmitry Selyutin | pysvp64asm: switch to new fields |
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2022-08-29 |
Dmitry Selyutin | power_insn: switch to new fields |
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2022-08-29 |
Dmitry Selyutin | selectable_int: refactor fields mappings |
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2022-08-29 |
Dmitry Selyutin | power_insn: decouple instruction classes |
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2022-08-29 |
Dmitry Selyutin | pysvp64dis: provide BC mode sketch |
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2022-08-29 |
Dmitry Selyutin | pysvp64asm: clean import directives |
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2022-08-29 |
Dmitry Selyutin | pysvp64dis: refactor inheritance model |
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2022-08-29 |
Dmitry Selyutin | pysvp64dis: introduce disassemble routine |
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2022-08-29 |
Dmitry Selyutin | pysvp64dis: consider instruction name |
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2022-08-29 |
Dmitry Selyutin | pysvp64dis: consult the instruction database |
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2022-08-29 |
Dmitry Selyutin | pysvp64dis: accept SelectableInt as an Instruction |
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2022-08-29 |
Dmitry Selyutin | pysvp64dis: introduce Suffix helper class |
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2022-08-29 |
Dmitry Selyutin | pysvp64dis: introduce global cached insn database |
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2022-08-29 |
Dmitry Selyutin | pysvp64dis: refactor prefix handling |
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2022-08-29 |
Dmitry Selyutin | pysvp64dis: introduce Prefix and RM classes |
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2022-08-29 |
Dmitry Selyutin | pysvp64dis: dump to output file; use explicit arguments |
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2022-08-29 |
Dmitry Selyutin | pysvp64dis: refactor classes; use fields helpers |
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2022-08-29 |
Dmitry Selyutin | pysvp64dis: fix prefix/suffix properties |
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2022-08-29 |
Dmitry Selyutin | pysvp64asm: uncomment the remapped instructions |
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2022-08-29 |
Luke Kenneth Casso... | Revert "support assembling svp64 instructions with... |
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2022-08-29 |
Luke Kenneth Casso... | add two instructions demoing broken commit 0e80cab3b809d43 |
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2022-08-29 |
Jacob Lifshay | support assembling svp64 instructions with custom suffi... |
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2022-08-26 |
Luke Kenneth Casso... | code-shuffle on if/elif/nots in sv/trans/svp64.py |
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2022-08-26 |
Jacob Lifshay | add original instruction as a comment, improving debugg... |
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2022-08-26 |
Jacob Lifshay | add support for comments in instructions |
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2022-08-26 |
Jacob Lifshay | include original svp64 instruction in comment on prefix |
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2022-08-26 |
Jacob Lifshay | fix typo |
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2022-08-26 |
Luke Kenneth Casso... | update comments |
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2022-08-25 |
Jacob Lifshay | fix assembling `sv.add.` |
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2022-08-25 |
Jacob Lifshay | format .../trans/svp64.py |
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2022-08-24 |
Luke Kenneth Casso... | remove non-orthogonal ldst_shift |
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2022-08-24 |
Luke Kenneth Casso... | fix annoying typo, comment-out asm_process() |
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2022-08-24 |
Luke Kenneth Casso... | ha ha very funny, sv.andi does not exist, only "sv... |
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2022-08-24 |
Jacob Lifshay | fix translation of instructions that require Rc=True... |
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2022-08-17 |
Dmitry Selyutin | sv_binutils: support functions |
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2022-08-16 |
Dmitry Selyutin | pysvp64dis: rename the script due to name conflicts |
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2022-08-15 |
Dmitry Selyutin | pysvp64dis: switch to SelectableInt class |
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2022-08-15 |
Dmitry Selyutin | pysvp64dis: introduce disassembler script |
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2022-08-14 |
Dmitry Selyutin | sv_binutils: consider only SVP64 instructions |
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2022-08-14 |
Dmitry Selyutin | sv_binutils: do not generate svp64_opindex_rm_field |
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2022-08-14 |
Dmitry Selyutin | sv_binutils: support opcodes |
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2022-08-14 |
Dmitry Selyutin | sv_binutils: migrate to instructions db |
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2022-08-14 |
Dmitry Selyutin | isatables: introduce instruction database CSV |
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2022-08-14 |
Dmitry Selyutin | sv_analysis: decouple CSVs glob code |
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2022-08-13 |
Luke Kenneth Casso... | remove Pack/Unpack flag entirely from sv_analysis |
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2022-08-13 |
Luke Kenneth Casso... | disable pack/unpack in sv_analysis.py - going to use... |
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2022-08-07 |
Luke Kenneth Casso... | move reg ptogiling out to separate function in sv_analysis |
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2022-08-07 |
Luke Kenneth Casso... | move extra classification to separate function in sv_an... |
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2022-08-06 |
Luke Kenneth Casso... | split cav reading into separate function |
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2022-08-06 |
Luke Kenneth Casso... | add svanalysis docstrings |
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2022-08-05 |
Luke Kenneth Casso... | Revert "comment out mfcr in sv_analysis.py for now" |
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2022-08-05 |
Luke Kenneth Casso... | add fishmv unusual overwrite to svanalysis |
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2022-08-05 |
Luke Kenneth Casso... | comment out mfcr in sv_analysis.py for now |
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2022-08-04 |
Dmitry Selyutin | sv_binutils: drop dead code |
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2022-08-03 |
Luke Kenneth Casso... | completely bungled multi-EXTRA specs |
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2022-08-03 |
Luke Kenneth Casso... | WHOOPS. set the pack column in CSV files unconditionall... |
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2022-07-30 |
Dmitry Selyutin | sv_binutils: refactor naming conventions |
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2022-07-30 |
Dmitry Selyutin | sv_binutils: introduce svp64_opindex_rm_field routine |
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2022-07-30 |
Luke Kenneth Casso... | add LDST-2P-*PU.csv, tracked down weirdness, it was the |
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2022-07-30 |
Luke Kenneth Casso... | addPack/Unpack to sv_analysis, extra CSV column. |
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2022-07-28 |
Luke Kenneth Casso... | much dumbness. fmvis is RM-1P-1D |
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2022-07-28 |
Luke Kenneth Casso... | Revert "add fmvis as a new RM-1P-1S SVP64 RM type" |
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2022-07-28 |
Luke Kenneth Casso... | add fmvis as a new RM-1P-1S SVP64 RM type |
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2022-07-28 |
Dmitry Selyutin | sv_binutils: include SVP64 context header |
tree | commitdiff |
2022-07-28 |
Dmitry Selyutin | sv_binutils: remove separate CRs table |
tree | commitdiff |
2022-07-27 |
Luke Kenneth Casso... | add extra fmvis to see what is going on |
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2022-07-27 |
Konstantinos Marga... | Fix fmvis & fishmv bit handling for d0, add tests for... |
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2022-07-27 |
Konstantinos Marga... | Add fishmv instruction (bug #887) |
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2022-07-27 |
Konstantinos Marga... | fix wrong shift in fmvis, use correct immediates in... |
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2022-07-26 |
Luke Kenneth Casso... | add some more example fmvis to work out which is LSB... |
tree | commitdiff |
2022-07-26 |
Luke Kenneth Casso... | add example fmvis instruction to trans/svp64.py |
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2022-07-26 |
Luke Kenneth Casso... | annoying. DX-Form is one exception to the rule of havin... |
tree | commitdiff |
2022-07-26 |
Konstantinos Marga... | fix fmvis decoder, it's now a 2-operand instruction |
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2022-07-26 |
Konstantinos Marga... | Add fmvis instruction + tests, bug #887 |
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2022-07-25 |
Dmitry Selyutin | svp64.py: fix alignment |
tree | commitdiff |
2022-07-25 |
Dmitry Selyutin | svp64.py: update svindex operands |
tree | commitdiff |
2022-07-21 |
Luke Kenneth Casso... | add dsubstep to ISACaller |
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2022-07-20 |
Luke Kenneth Casso... | rename substep to ssubstep, add dsubstep to SVP64State |
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2022-07-18 |
Luke Kenneth Casso... | rename SVSTATE.svstep to SVSTATE.substep to avoid |
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2022-07-12 |
Luke Kenneth Casso... | add recognition of 0xNNN and 0bMMMM to sv/trans/svp64.py |
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2022-07-11 |
Andrey Miroshnikov | Added insn initialisation for grev() func |
tree | commitdiff |
2022-07-06 |
Dmitry Selyutin | svp64.py: allow macros as register names |
tree | commitdiff |
2022-07-06 |
Dmitry Selyutin | svp64.py: generate registers |
tree | commitdiff |
2022-07-05 |
Luke Kenneth Casso... | convert test_caller_setvl.py to new vector numbering... |
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2022-07-05 |
Luke Kenneth Casso... | add "*%" and "*" vector-numbering convention |
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2022-07-05 |
Luke Kenneth Casso... | add note about bug #884 new reg vector naming convention |
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2022-06-30 |
Luke Kenneth Casso... | do CSV isatables explicitly in sv_analysis.py |
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2022-06-30 |
Luke Kenneth Casso... | explicit output of opcode_regs_deduped in mdwn table... |
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2022-06-28 |
Luke Kenneth Casso... | add recognition of "sv." to pysvp64asm |
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2022-06-26 |
Luke Kenneth Casso... | whoops svp64.py testing wrong variable on sv.svstep |
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2022-06-26 |
Luke Kenneth Casso... | rename SVRM *field* to SVrm to avoid a name-clash with |
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2022-06-26 |
Dmitry Selyutin | svp64.py: decrement SVd operand |
tree | commitdiff |
2022-06-26 |
Dmitry Selyutin | svp64.py: fix ignored field range |
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2022-06-26 |
Dmitry Selyutin | svp64.py: drop commented code |
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2022-06-26 |
Dmitry Selyutin | svp64.py: fix fsins/fcoss X-FORM |
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2022-06-26 |
Luke Kenneth Casso... | whitespace |
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