Revert "disable fmv / fcvt unit tests as there are such a vast number"
[openpower-isa.git] / src / openpower / test / bitmanip /
2023-06-02 Dmitry Selyutinpysvp64asm: integrate into insndb
2023-04-25 Jacob Lifshayreplace min/max[su][.] with minmax[.]
2022-10-24 Luke Kenneth Casso... add maxs. combined with cmp capability
2022-08-13 Luke Kenneth Casso... invalidate grev cases, replaced by grevlut
2022-06-25 Luke Kenneth Casso... correct input example for SOF case_3_bmask
2022-06-25 Andrey MiroshnikovAdded sif/sof
2022-06-25 Luke Kenneth Casso... corrections to test cases, it is not quite
2022-06-25 Luke Kenneth Casso... update comments in av_cases.py test_1_bmask
2022-06-24 Andrey MiroshnikovAdded second bmask test case, designed to be multi...
2022-06-24 Luke Kenneth Casso... add first bmask unit test
2022-06-22 Andrey MiroshnikovAdded pc based on len(lst)
2022-06-22 Luke Kenneth Casso... add another cprop test, experimenting
2022-06-22 Luke Kenneth Casso... add 2nd cprop test to see what happens
2022-06-22 Luke Kenneth Casso... expected number of instructions is 1 (therefore PC...
2022-06-22 Andrey MiroshnikovAdded cprop test case, fails atm (not enabled by default)
2022-06-20 Luke Kenneth Casso... add absolute-signed-diff next to absolute-unsigned...
2022-06-20 Luke Kenneth Casso... rename absadd[us] to absdac[ud]
2022-06-19 Jacob Lifshayfix minu[.] to be unsigned
2022-06-19 Luke Kenneth Casso... add absadds - signed accumulating add. DRAFT
2022-06-19 Luke Kenneth Casso... add absadd (unsigned) DRAFT
2022-06-19 Luke Kenneth Casso... add absolute-difference DRAFT
2022-06-19 Luke Kenneth Casso... add average-add DRAFT pseudocode and CSV
2022-06-19 Luke Kenneth Casso... add the rest of min/max DRAFT av opcodes
2022-06-19 Luke Kenneth Casso... add maxs DRAFT instruction
2022-05-03 Jacob Lifshayadd Rc to ternlogi
2022-01-18 Jacob Lifshaygrev[w][i][.] pseudo-code works
2022-01-06 Jacob Lifshayadd stand-alone simulator bitmanip test
2021-12-10 Jacob Lifshayadd ternlogi to SVP64Asm
2021-12-10 Jacob Lifshaychange ternlogi to not have Rc field
2021-12-09 Jacob Lifshaymake ternlogi tests run
2021-12-09 Jacob Lifshayrename ternaryi to ternlogi
2021-11-17 Jacob Lifshayadd bitmanip_cases.py