add SRR0 and SRR1 to list of special_regs in parser
[openpower-isa.git] / src / openpower / test /
2023-12-22 Luke Kenneth Casso... add sc test to TestTrapCases
2023-12-22 Luke Kenneth Casso... code-comments
2023-12-22 Luke Kenneth Casso... moving the temp array (t) along, so that adding to...
2023-12-22 Luke Kenneth Casso... first attempt to create an Indexed Schedule, for bigmul...
2023-12-22 Jacob Lifshayfix divmod
2023-12-22 Jacob Lifshayin divmod algorithm log regexes that match against...
2023-12-22 Jacob Lifshaytest python_divmod_algorithm
2023-12-22 Jacob Lifshayformat code
2023-12-22 Luke Kenneth Casso... remove use of addc, use adde instead setting ca to...
2023-12-22 Luke Kenneth Casso... reduce 4-repeats of identical code down to 1 copy with...
2023-12-22 Luke Kenneth Casso... add seeming-redundant addc/adde (actually part of big...
2023-12-22 Luke Kenneth Casso... code-cleanup, bit of comments, copyright, blah blah...
2023-12-22 Luke Kenneth Casso... add what is currently a duplicate of python_mul_algorit...
2023-12-22 Jacob Lifshayworking on adding divmod 512x256 to 256x256
2023-12-22 Jacob Lifshayadd unit test for mcrxrx
2023-12-22 Jacob Lifshayfix wrong register in docs
2023-12-22 Jacob Lifshay256x256-bit mul no longer broken since bug #1161 was...
2023-12-22 Jacob Lifshayadd MemMMap class
2023-12-22 Jacob Lifshaysplit out most Mem methods into MemCommon base class
2023-12-22 Luke Kenneth Casso... add python-based implementation of dsrd to poly1305...
2023-12-22 Jacob Lifshayadd tests for checking if the simulator and assembler...
2023-12-22 Jacob Lifshaychange registers used to avoid r13-31 which are reserve...
2023-12-22 Jacob Lifshaypass in stack pointer
2023-12-22 Jacob Lifshayadd copyright stuff
2023-12-22 Andrey Miroshnikovsyscall_cases: Added link to ABI and write manpage
2023-12-22 Andrey Miroshnikovsyscall_cases: Add license, copyright, NLnet message.
2023-12-22 Jacob Lifshayadd SVP64 256x256->512-bit multiply
2023-12-22 Jacob Lifshaygeneralize assemble() fn so other test cases can easily...
2023-12-22 Andrey Miroshnikovsyscall_cases: Aded expected values for SRR0/1, MSR...
2023-12-22 Andrey MiroshnikovAdding syscall ISACaller test case (not working yet).
2023-12-22 Jacob Lifshayremove grev, leaving unit tests for later use by grevlut
2023-12-22 Jacob Lifshaymark madd* as skipped in soc.git
2023-12-22 Jacob Lifshayfilter out v3.1 insns when soc flag set -- soc.git...
2023-12-22 Jacob Lifshayfilter out addex when soc flag set
2023-12-22 Jacob Lifshayadd support for filtering tests using flags
2023-12-22 Konstantinos Marga... split testcase for separate maddrs/msubrs
2023-12-22 Jacob Lifshayfix set[n]bc[r]
2023-12-22 Jacob Lifshayadd set[n]bc[r] -- tests broken
2023-12-22 Jacob Lifshayformat code
2023-12-22 Luke Kenneth Casso... shortened variable names,
2023-12-22 Jacob Lifshayadd SVP64 test for byte reverse insns
2023-12-22 Jacob Lifshayadd SVP64 tests for cfuged, cntlzdm, cnttzdm, pdepd...
2023-12-22 Jacob Lifshayformat code
2023-12-22 Jacob Lifshayadd pdepd/pextd
2023-12-22 Jacob Lifshayadd cfuged
2023-12-22 Jacob Lifshayadd cntlzdm/cnttzdm
2023-12-22 Jacob Lifshayformat code
2023-12-22 Konstantinos Marga... Moved maddsubrs/maddrs/msubrs instructions to separate...
2023-12-22 Jacob Lifshayadd much more exhaustive maddrs unit tests
2023-12-22 Jacob Lifshayadd much more exhaustive maddsubrs unit tests
2023-12-22 Jacob Lifshayformat code
2023-12-22 Jacob Lifshayadd byte reverse instructions from PowerISA v3.1B
2023-12-22 Konstantinos Marga... revert to correct value
2023-12-22 Konstantinos Marga... Unify XLEN =64 special case in the new code
2023-12-22 Jacob Lifshayadd fminmax tests with corresponding pseudocode fixes
2023-12-22 Jacob Lifshayupdate to use new fminmax instruction
2023-12-22 Jacob Lifshayrename fmv[ft]g*/fcvt[ft]g* to m[tf]fpr*/c[tf]fpr*
2023-12-22 Jacob Lifshayremove Rc=1 from fmvfg[s]
2023-12-22 Jacob Lifshayadd sv.fmv/sv.fcvt tests
2023-12-22 Jacob Lifshayadd fmvfg[s] and fmvtg[s][.] tests
2023-12-22 Jacob Lifshaydeepcopy is really slow and unnecessary here
2023-12-22 Jacob Lifshayspeed up StateSPRs.__init__
2023-12-22 Jacob Lifshaycache FPSCR computation since it's slow
2023-12-22 Jacob LifshayRevert "disable fmv / fcvt unit tests as there are...
2023-12-22 Dmitry Selyutinpysvp64asm: integrate into insndb
2023-06-02 Luke Kenneth Casso... disable fmv / fcvt unit tests as there are such a vast...
2023-06-02 Jacob Lifshayadd expected values to source
2023-06-02 Jacob Lifshayadd worked-out svp64 16-bit maddsubrs test case
2023-06-02 Jacob Lifshayfcvtfg works!
2023-06-02 Jacob Lifshayadd support for checking sprs and msr in unit tests
2023-06-02 Jacob Lifshayuse a different default MSR value for unit tests since...
2023-06-02 Luke Kenneth Casso... https://bugs.libre-soc.org/show_bug.cgi?id=1091
2023-06-02 Jacob Lifshaytest fcvttgo. with traps enabled
2023-06-02 Jacob Lifshaytest fcvttgo. with VE=1 too
2023-06-02 Luke Kenneth Casso... whitespace - bug in autopep8 which is dreadful
2023-06-02 Jacob Lifshaymust test fcvtfgs not fcvtfg for f32 test case
2023-06-02 Jacob Lifshayformat code
2023-06-02 Jacob Lifshayfix fptrans unit tests' CR1 expected values since we...
2023-06-02 Jacob Lifshayadd WIP fcvtfg unit tests
2023-06-02 Jacob Lifshayfix fcvttg FPSCR.FR computation
2023-06-02 Jacob Lifshayonly retrieve stack frames we need -- ~2x speed up...
2023-06-02 Jacob Lifshaytest fcvttgo. instead of fcvttg
2023-06-02 Jacob Lifshaytest all fp -> int conversion modes
2023-06-02 Jacob Lifshayadd support for setting initial FPSCR in unit tests
2023-06-02 Jacob Lifshayrename js_toint -> toint in preparation for adding...
2023-06-02 Jacob Lifshayexpand fcvttg js tests to also test conversion to u32...
2023-06-02 Jacob Lifshayrename js_toint32 -> js_toint in preparation for adding...
2023-06-02 Jacob Lifshayfcvttg*: test FPSCR output
2023-06-02 Jacob Lifshaymake mis-matched FPSCR errors much easier to read
2023-06-02 Jacob Lifshayignore FPSCR in fcvt js test
2023-06-02 Jacob Lifshayallow ignoring FPSCR in tests
2023-06-02 Luke Kenneth Casso... add FPSCR to Test API (ExpectedState, SimState). untested
2023-06-02 Jacob Lifshayadd initial fmv/fcvt tests, though they're broken due...
2023-06-02 Konstantinos Marga... merge maddrs/msubrs, unit tests changed accordingly
2023-06-02 Konstantinos Marga... Add 2 more instructions to help with 2-coeff butterfly
2023-06-02 Konstantinos Marga... Handle large 64-bit values, but only the low 64-bit...
2023-06-02 Konstantinos Marga... do proper rounding, no rounding for SH=0 (for now)...
2023-06-02 Konstantinos Marga... handle negatives correctly by adding sign bit to final...
2023-06-02 Konstantinos Marga... almost there, positive values work, negative values...
2023-06-02 Konstantinos Marga... WIP: maddsubrs initial approach
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