sv_binutils: support multiple opcodes; minor fixes
[openpower-isa.git] / src / openpower / test /
2021-12-04 Luke Kenneth Casso... test in SimState for access to RADIX memory, bypass...
2021-12-03 Luke Kenneth Casso... add link to exceptions in gtkw traces
2021-12-01 Luke Kenneth Casso... fix expected state in hazard test
2021-12-01 Luke Kenneth Casso... fix expected state in hazard case_regression_1
2021-12-01 Luke Kenneth Casso... add a proper twin addi regression which tests Reservati...
2021-11-30 Luke Kenneth Casso... add randomised hazard test
2021-11-30 Luke Kenneth Casso... add two more hazard tests
2021-11-30 Luke Kenneth Casso... attempting to use PowerDecode2 in non-svp64 mode
2021-11-27 Luke Kenneth Casso... add extra overlap hazard test
2021-11-26 R Veera KumarShorten expected state code for case_extsb using exts...
2021-11-26 R Veera KumarShorten expected state code for case_extsb in alu_cases...
2021-11-26 R Veera KumarShorten expected state code for case_rand in alu_cases...
2021-11-26 R Veera KumarShorten case_rand_imm alu test case code
2021-11-26 R Veera KumarMake carry_out32 variable boolean and expected state...
2021-11-25 R Veera KumarShortened code in case_addis_nonzero_r0 alu test case
2021-11-25 R Veera KumarCorrect add-equal operator in case_rand_imm
2021-11-25 R Veera KumarShort the code of case_rand_imm
2021-11-24 R Veera KumarFix line so that 80 characters per line is kept and...
2021-11-24 R Veera KumarAdd expected state to case_rand_imm in alu_cases unit...
2021-11-24 Luke Kenneth Casso... corrections to hazard overlap test
2021-11-24 Luke Kenneth Casso... add extra hazard unit tests
2021-11-24 Luke Kenneth Casso... tidyup on case_0_adde
2021-11-24 Luke Kenneth Casso... correct write-after-write hazard test (expected values)
2021-11-23 R Veera KumarAdd expected state to case_0_adde in alu_cases unit...
2021-11-23 Luke Kenneth Casso... add write-after-write hazard test for inorder core
2021-11-23 R Veera KumarAdd expected state to case_rand in alu_cases unit test
2021-11-23 R Veera KumarAdd expected state to case_addis_nonzero_r0 in alu_case...
2021-11-23 R Veera KumarAdd expected state to case_extsb in alu_cases unit...
2021-11-23 R Veera KumarAdd computed CR0 to expected version of case_adde_0
2021-11-22 Luke Kenneth Casso... add expected version of case_adde_0
2021-11-22 Luke Kenneth Casso... adding a couple more hazard avoidance cases
2021-11-22 R Veera KumarAdd expected state to case_cmpeqb in alu_cases unit...
2021-11-22 R Veera KumarAdd expected state to case_cmplw_microwatt_1 in alu_cas...
2021-11-22 R Veera KumarAdd expected state to case_cmpli_microwatt in alu_cases...
2021-11-22 R Veera KumarAdd expected state to case_cmpl_microwatt_0_disasm...
2021-11-22 R Veera KumarAdd expected state to case_cmpl_microwatt_0 in alu_case...
2021-11-22 R Veera KumarAdd expected state to case_addme_ca_so_4 in alu_cases...
2021-11-22 R Veera KumarAdd expected state to case_addme_ca_so_3 in alu_cases...
2021-11-22 R Veera KumarAdd expected state to case_addme_ca_1 in alu_cases...
2021-11-21 Luke Kenneth Casso... sigh, for overlap mode there is no safe way to get...
2021-11-21 Luke Kenneth Casso... move dump state to base class State in test API
2021-11-21 R Veera KumarAdd expected state to case_cmp3 in alu_cases unit test
2021-11-21 R Veera KumarAdd expected state to case_cmp2 in alu_cases unit test
2021-11-21 R Veera KumarAdd expected state to case_cmp in alu_cases unit test
2021-11-21 R Veera KumarAdd expected state to all of case_addze in alu_cases...
2021-11-17 Jacob Lifshayadd bitmanip_cases.py
2021-11-17 Luke Kenneth Casso... add allow_overlap argument to TestRunnerBase
2021-11-17 Luke Kenneth Casso... code-comments
2021-11-17 Luke Kenneth Casso... XER regspec_decode_write was not sophisticated enough.
2021-11-17 Luke Kenneth Casso... split up regression cases so that a single Rc=1 add...
2021-11-11 Luke Kenneth Casso... add case-based expected results in addme alu_cases
2021-11-11 Luke Kenneth Casso... invert speedup (commenting-out) of tests
2021-11-11 Luke Kenneth Casso... sort out numbering on CRs in SimState
2021-11-11 Luke Kenneth Casso... whitespace
2021-11-11 Luke Kenneth Casso... fix test API State.compare which was overwriting intreg...
2021-11-11 Luke Kenneth Casso... https://bugs.libre-soc.org/show_bug.cgi?id=730#c27
2021-11-11 Luke Kenneth Casso... add unexpected result to see what happens
2021-11-11 Luke Kenneth Casso... use append on expected state dump, not ideal but
2021-11-11 Luke Kenneth Casso... add core state to gtkw
2021-11-11 R Veera KumarAdd expected state to case_addze for addze in alu_cases...
2021-11-11 R Veera KumarAdd expected state to case_1_regression for 'add' in...
2021-11-11 R Veera KumarAdd expected state to case_1_regression for extsb in...
2021-11-11 R Veera KumarAdd expected state to case_1_regression for subf (2...
2021-11-10 Luke Kenneth Casso... attempt to get gtkw simulator signals updated on WB MMU
2021-11-10 R Veera KumarAdd expected state to case_1_regression for subf in...
2021-11-10 Luke Kenneth Casso... add LDST msr_pr to gtkw debug
2021-11-10 Luke Kenneth Casso... display 64 bits of msr
2021-11-10 Luke Kenneth Casso... add MSR to ldst operand debug gtkw
2021-11-10 Luke Kenneth Casso... add MSR to gtkw file for simulation output
2021-11-09 R Veera KumarAdd expected state to case_1_regression for extsw for...
2021-10-28 klehmanstate.py: Fix expected dump for cr regs
2021-10-25 klehmanspacing fix
2021-10-25 klehmantests now dump into caller dirs
2021-10-25 klehmanget file name from stack, add in TestCase
2021-10-25 klehmantmp creation/string formatting
2021-10-25 klehmanadded dump_state_tofile for code creation
2021-10-07 klehmanadditional comments for runner
2021-10-07 klehmantypo: gpr not fpr
2021-10-07 klehmanvarious test state comments
2021-10-01 klehmanfix for self.rom core
2021-10-01 Luke Kenneth Casso... set run_hdl arg to None because it passes in a class now
2021-10-01 Luke Kenneth Casso... copy over TestRunner class from soc/simple/test/test_ru...
2021-09-25 Luke Kenneth Casso... add name parameter to StateRunner
2021-09-25 Luke Kenneth Casso... add factory-function for StateRunner
2021-09-25 Luke Kenneth Casso... convert all SimRunner functions to yield
2021-09-24 Luke Kenneth Casso... guessing what extra args needed for StateRunner
2021-09-24 klehmanadd SimRunner constructor
2021-09-24 Luke Kenneth Casso... rename shift tests, move to test cases directory
2021-09-23 Luke Kenneth Casso... add extra functions for StateRunner
2021-09-23 Luke Kenneth Casso... create Abstract Base Class StateRunner
2021-09-22 Luke Kenneth Casso... add first "ExpectedState" to HDL-sim ALU test cases
2021-09-22 klehmantests for test state class
2021-09-22 Luke Kenneth Casso... and add expected to TestAccumulatorBase
2021-09-22 Luke Kenneth Casso... add expected argument to TestCase
2021-09-22 klehmanmade mem sizes equal for compare purposes
2021-09-21 klehmanadded teststate_check_mem
2021-09-21 Luke Kenneth Casso... fix borked TestState.get_mem() assumed simmem.depth... DRAFT_SVP64_0_1
2021-09-20 Luke Kenneth Casso... syntax error
2021-09-20 Luke Kenneth Casso... walk whole of sim memory rather than risk missing some...
2021-09-18 Luke Kenneth Casso... always store full memory state (including zeros)
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