sigh, I-DCT had to reverse the order of middle loop to stop
[openpower-isa.git] / src /
2021-07-29 Luke Kenneth Casso... sigh, I-DCT had to reverse the order of middle loop...
2021-07-29 Luke Kenneth Casso... start on inverse dct, turning recursive to iterative
2021-07-28 Luke Kenneth Casso... start on inverse DCT, transforming to iterative
2021-07-28 Luke Kenneth Casso... got DCT LD-bit-rev demo operational in unit test
2021-07-28 Luke Kenneth Casso... fix LD/ST bitreverse with Matrix REMAP to instead be...
2021-07-28 Luke Kenneth Casso... argh, have LD-bitreverse select the offset from RA...
2021-07-28 Luke Kenneth Casso... add mode for half-swap, to be combined with LD-bit...
2021-07-28 Luke Kenneth Casso... code comments
2021-07-27 Luke Kenneth Casso... fix test_power_decoder.py
2021-07-27 Luke Kenneth Casso... get DCT shortened table operational
2021-07-27 Dmitry Selyutinpower_enums: cbcdtd instruction
2021-07-27 Dmitry Selyutinpower_enums: cdtbcd instruction
2021-07-27 Dmitry Selyutinpower_enums: addg6s instruction
2021-07-27 Luke Kenneth Casso... adding reduced COS table DCT test
2021-07-27 Luke Kenneth Casso... add new DCT inner butterfly shorter COS-gen mode unit...
2021-07-27 Luke Kenneth Casso... fix new COSTABLE generator unit test,
2021-07-27 Luke Kenneth Casso... fix up DCT modes for inner/outer butterfly,
2021-07-27 Luke Kenneth Casso... argh, LD/ST using DS has to be computed differently.
2021-07-27 Luke Kenneth Casso... fix errors in detection of ffmadds (etc), enabling...
2021-07-27 Luke Kenneth Casso... add new cos coefficient pre-computed and on-the-fly...
2021-07-26 Luke Kenneth Casso... use ydimsz as sub-mode in DCT/FFT butterfly
2021-07-26 Luke Kenneth Casso... use std not stw in transcendentals ld/st-convert test
2021-07-26 Luke Kenneth Casso... add dct cos 8 table test
2021-07-24 Luke Kenneth Casso... add sv.fcoss SVP64Asm support
2021-07-24 Luke Kenneth Casso... add DS-Form support for sv.std
2021-07-24 Luke Kenneth Casso... added an extra SVP64 instruction, svstep, to replace...
2021-07-24 Luke Kenneth Casso... add experiment to convert int to float and multiply...
2021-07-24 Luke Kenneth Casso... add ability to get current SVSHAPE indices into a register,
2021-07-24 Luke Kenneth Casso... comments
2021-07-24 Luke Kenneth Casso... add DCT unit test combining DCT inner and outer butterfly
2021-07-24 Luke Kenneth Casso... create schedule for calculating COS coefficient in DCT
2021-07-23 Luke Kenneth Casso... add DCT outer butterfly iterative overlapping ADD schedule
2021-07-23 Luke Kenneth Casso... small inner DCT butterfly test, fix up order of fdmadds
2021-07-23 Luke Kenneth Casso... add DCT inner butterfly results test
2021-07-23 Luke Kenneth Casso... "fix" fdmadd DCT mul-add-sub unit test with values...
2021-07-23 Luke Kenneth Casso... add sv.fdmadds unit test
2021-07-23 Luke Kenneth Casso... add sv.fdmadds to SVP64Asm
2021-07-23 Luke Kenneth Casso... add DCT mul-add to CSV and enums
2021-07-23 Luke Kenneth Casso... set up submodes for SVSHAPE, to include DCT butterfly...
2021-07-22 Luke Kenneth Casso... split out 2nd dct outer butterfly scheduler
2021-07-22 Luke Kenneth Casso... half way through converting in-place dct to yield unit...
2021-07-22 Luke Kenneth Casso... add inner and outer yield version of DCT inner and...
2021-07-22 Luke Kenneth Casso... copy of halfrev2 algorithm updated
2021-07-22 Luke Kenneth Casso... simplification of halfrev2 algorithm (really neat)
2021-07-22 Luke Kenneth Casso... add REMAP DCT yield schedule function, TODO
2021-07-22 Luke Kenneth Casso... add hybrid LD-ST-bitreverse with REMAP as an experiment
2021-07-22 Luke Kenneth Casso... corrections to SVP64 LD/ST unit tests
2021-07-20 Luke Kenneth Casso... comments
2021-07-20 Luke Kenneth Casso... create cos table independent, outside of the inner...
2021-07-20 Luke Kenneth Casso... cleanup
2021-07-20 Luke Kenneth Casso... add iterative list-reversing algorithm, replace recursi...
2021-07-20 Luke Kenneth Casso... pre-reverse order of data indices in DCT so that *after...
2021-07-20 Luke Kenneth Casso... temporary reordering after the DCT schedule is carried...
2021-07-20 Luke Kenneth Casso... add inner sub-loop testing from svstep Rc=1
2021-07-20 Luke Kenneth Casso... comments
2021-07-20 Luke Kenneth Casso... comments
2021-07-19 Luke Kenneth Casso... bit of a reorg, adding option to test end of inner...
2021-07-19 Luke Kenneth Casso... do in-place swap
2021-07-19 Luke Kenneth Casso... annoying: missed out something in the unit test, not...
2021-07-19 Luke Kenneth Casso... simplify DCT code
2021-07-19 Luke Kenneth Casso... create coefficient table for DCT outside of loops
2021-07-19 Luke Kenneth Casso... update comments
2021-07-19 Luke Kenneth Casso... more comments
2021-07-19 Luke Kenneth Casso... update comments and license
2021-07-19 Luke Kenneth Casso... remove unneeded code
2021-07-19 Luke Kenneth Casso... no need for len(j) > 1 test, half of 1 is zero which...
2021-07-19 Luke Kenneth Casso... remove unneeded code
2021-07-19 Luke Kenneth Casso... swap the indices rather than the data in DCT top half...
2021-07-19 Luke Kenneth Casso... remove copy, use in-place with post-inner-loop swap
2021-07-19 Luke Kenneth Casso... add experimental order-reversing code (commented out...
2021-07-19 Luke Kenneth Casso... code comments
2021-07-19 Luke Kenneth Casso... whitespace cleanup
2021-07-19 Luke Kenneth Casso... move bit-reversing to before MULs in DCT
2021-07-19 Luke Kenneth Casso... reverse bit-order of in-place outer DCT butterfly
2021-07-19 Luke Kenneth Casso... finallygot the DCT outer butterfly correct
2021-07-18 Luke Kenneth Casso... got cos intermediate working on iterative dct
2021-07-18 Luke Kenneth Casso... experimenting to create iterative version of dct
2021-07-18 Luke Kenneth Casso... use lists rather than list incomprehension
2021-07-17 Luke Kenneth Casso... print out some debug statements in fastdctlee
2021-07-17 Luke Kenneth Casso... whitespace
2021-07-17 Luke Kenneth Casso... add naive dct, remove fft variant
2021-07-17 Luke Kenneth Casso... add nayuki dct
2021-07-17 Luke Kenneth Casso... working RADIX-2 FFT with bit-reversed LD/ST
2021-07-17 Luke Kenneth Casso... add FP LOAD bit-reversed operations to ISACaller simulator
2021-07-16 Luke Kenneth Casso... add fsins and fcoss to simulator
2021-07-16 Luke Kenneth Casso... add nayuki project reference code
2021-07-15 Luke Kenneth Casso... use coincidence of svremap "persistence" to remove...
2021-07-15 Luke Kenneth Casso... enable use of svremap "persist" mode, remove 4 instruct...
2021-07-15 Luke Kenneth Casso... stop using MSR vfirst bit, move to SVSTATE bit 63 instead
2021-07-15 Luke Kenneth Casso... add extra "persistence" bit to svremap instruction
2021-07-15 Luke Kenneth Casso... big intrusive update: merge SVREMAP with SVSTATE, remov...
2021-07-14 Luke Kenneth Casso... use fmadds and fmsubs in complex fft example
2021-07-14 Luke Kenneth Casso... update SVSTATE to 64 bit length
2021-07-14 Luke Kenneth Casso... subtract one from SVi field for setvl assembler
2021-07-13 Luke Kenneth Casso... change order of log printout for "writing gpr NN"
2021-07-12 Luke Kenneth Casso... successful complex FFT butterfly, in-place, using Verti...
2021-07-12 Luke Kenneth Casso... add a Discrete FFT butterfly unit test as an intermedia...
2021-07-11 Luke Kenneth Casso... minor reordering of setvl and svshape: svshape is now...
2021-07-11 Luke Kenneth Casso... add svremap instruction into ISACaller
2021-07-11 Luke Kenneth Casso... update svremap instruction to correctly store immediate...
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