power_insn: fix sv_extra algorithm
[openpower-isa.git] / src /
2022-08-17 Dmitry Selyutinpower_insn: fix sv_extra algorithm
2022-08-17 Dmitry Selyutinpower_enums: fix conversion from selector to reg
2022-08-17 Luke Kenneth Casso... again part of the removal of LD/ST-with-shift, take out
2022-08-16 Dmitry Selyutinpysvp64dis: rename the script due to name conflicts
2022-08-15 Dmitry Selyutinpysvp64dis: switch to SelectableInt class
2022-08-15 Dmitry Selyutinpysvp64dis: introduce disassembler script
2022-08-15 Luke Kenneth Casso... codeshuffle
2022-08-15 Luke Kenneth Casso... swap complicated bits, simplify ISACaller, reduce inden...
2022-08-15 Luke Kenneth Casso... debug print for ISACaller pack/unpack
2022-08-15 Luke Kenneth Casso... extract pack/unpack as separate bits, and also do elwid...
2022-08-14 Luke Kenneth Casso... dang missed *another* argument in ISACaller on the...
2022-08-14 Dmitry Selyutinsv_binutils: consider only SVP64 instructions
2022-08-14 Dmitry Selyutinsv_binutils: do not generate svp64_opindex_rm_field
2022-08-14 Dmitry Selyutinsv_binutils: support opcodes
2022-08-14 Dmitry Selyutinsv_binutils: migrate to instructions db
2022-08-14 Dmitry Selyutinpower_insn.py: introduce instruction database
2022-08-14 Dmitry Selyutinisatables: introduce instruction database CSV
2022-08-14 Dmitry Selyutinpower_enums: map in/out to extra
2022-08-14 Dmitry Selyutinpower_enums: introduce SVMode enum
2022-08-14 Dmitry Selyutinpower_enums: introduce SVExtraReg enum
2022-08-14 Dmitry Selyutinpower_enums: introduce SVExtraRegType enum
2022-08-14 Dmitry Selyutinpower_enums: introduce SVExtra alias
2022-08-14 Dmitry Selyutinpower_enums: introduce RegType enum
2022-08-14 Dmitry Selyutinpower_enums: allow SVPtype aliases
2022-08-14 Dmitry Selyutinpower_enums: better repr for Function enum
2022-08-14 Dmitry Selyutinpower_enums: introduce LDSTLen alias class
2022-08-14 Dmitry Selyutinpower_enums: introduce base enum class
2022-08-14 Dmitry Selyutinsv_analysis: decouple CSVs glob code
2022-08-14 Luke Kenneth Casso... go with separate bit for Pack/Unpack mode in SVP64RMMod...
2022-08-14 Luke Kenneth Casso... remove LD/ST-shift mode from ISACaller
2022-08-14 Luke Kenneth Casso... add PACK/UNPACK Mode descriptions to power_svp64_rm.py
2022-08-13 Luke Kenneth Casso... remove Pack/Unpack flag entirely from sv_analysis
2022-08-13 Luke Kenneth Casso... disable pack/unpack in sv_analysis.py - going to use...
2022-08-13 Luke Kenneth Casso... invalidate grev cases, replaced by grevlut
2022-08-12 Luke Kenneth Casso... remove LDSTBREV condition, used for ld-st-with-shift
2022-08-12 Luke Kenneth Casso... remove use of sv ld shifted, replace with els, deprecat...
2022-08-12 Luke Kenneth Casso... remove use of sv.lfssh, deprecate the unit test
2022-08-12 Luke Kenneth Casso... remove use of sv.lfssh, replace with sv.lfs/els element...
2022-08-12 Luke Kenneth Casso... remove use of sv.lfssh, replace with sv.lfs/els element...
2022-08-09 Dmitry Selyutinpower_enums: add missing forms
2022-08-07 Luke Kenneth Casso... move reg ptogiling out to separate function in sv_analysis
2022-08-07 Luke Kenneth Casso... move extra classification to separate function in sv_an...
2022-08-06 Luke Kenneth Casso... split cav reading into separate function
2022-08-06 Luke Kenneth Casso... add svanalysis docstrings
2022-08-05 Luke Kenneth Casso... Revert "comment out mfcr in sv_analysis.py for now"
2022-08-05 Luke Kenneth Casso... add fishmv unusual overwrite to svanalysis
2022-08-05 Luke Kenneth Casso... comment out mfcr in sv_analysis.py for now
2022-08-04 Dmitry Selyutinsv_binutils: drop dead code
2022-08-03 Luke Kenneth Casso... completely bungled multi-EXTRA specs
2022-08-03 Luke Kenneth Casso... WHOOPS. set the pack column in CSV files unconditionall...
2022-07-31 Luke Kenneth Casso... whoops should be True
2022-07-31 Luke Kenneth Casso... whoops initialise nia_update to False
2022-07-30 Dmitry Selyutinsv_binutils: refactor naming conventions
2022-07-30 Dmitry Selyutinsv_binutils: introduce svp64_opindex_rm_field routine
2022-07-30 Luke Kenneth Casso... add README in ISA sim directory
2022-07-30 Luke Kenneth Casso... fix LDST immed using EXTRA2 not EXTRA3 in tests to...
2022-07-30 Luke Kenneth Casso... sigh begin process of fixing unit tests which are no...
2022-07-30 Luke Kenneth Casso... add LDST-2P-*PU.csv, tracked down weirdness, it was the
2022-07-30 Luke Kenneth Casso... addPack/Unpack to sv_analysis, extra CSV column.
2022-07-30 Luke Kenneth Casso... add PACK/UNPACK constants for RM-2P-1S1D-PU
2022-07-28 Luke Kenneth Casso... much dumbness. fmvis is RM-1P-1D
2022-07-28 Luke Kenneth Casso... Revert "add fmvis as a new RM-1P-1S SVP64 RM type"
2022-07-28 Luke Kenneth Casso... add fmvis as a new RM-1P-1S SVP64 RM type
2022-07-28 Dmitry Selyutinsv_binutils: include SVP64 context header
2022-07-28 Dmitry Selyutinsv_binutils: remove separate CRs table
2022-07-28 Jacob LifshayDOUBLE2SINGLE: convert doc comments to docstring
2022-07-28 Jacob Lifshayre-convert frsp pseudocode
2022-07-28 Jacob Lifshaytry to add some line numbers to ast -- helps with debugging
2022-07-28 Jacob Lifshayswitch ast for assignment to tuple to use the python...
2022-07-28 Jacob Lifshayfix line number tracking
2022-07-27 Jacob Lifshayadd another test and fix broken fishmv pseudocode
2022-07-27 Luke Kenneth Casso... add extra fmvis to see what is going on
2022-07-27 Konstantinos Marga... Fix fmvis & fishmv bit handling for d0, add tests for...
2022-07-27 Konstantinos Marga... Add fishmv instruction (bug #887)
2022-07-27 Konstantinos Marga... fix wrong shift in fmvis, use correct immediates in...
2022-07-26 Luke Kenneth Casso... update comments in fmvis case
2022-07-26 Luke Kenneth Casso... add first FP "expected state" use it in fmvis
2022-07-26 Luke Kenneth Casso... bit more docs on fmvis
2022-07-26 Luke Kenneth Casso... add some more example fmvis to work out which is LSB...
2022-07-26 Luke Kenneth Casso... add example fmvis instruction to trans/svp64.py
2022-07-26 Luke Kenneth Casso... annoying. DX-Form is one exception to the rule of havin...
2022-07-26 Konstantinos Marga... fix form and pseudo-code for fmvis, tests in 64-bit...
2022-07-26 Konstantinos Marga... fix fmvis decoder, it's now a 2-operand instruction
2022-07-26 Konstantinos Marga... Add fmvis instruction + tests, bug #887
2022-07-25 Dmitry Selyutinsvp64.py: fix alignment
2022-07-25 Dmitry Selyutinsvp64.py: update svindex operands
2022-07-23 Luke Kenneth Casso... dump output from pypowersim_fp
2022-07-21 Luke Kenneth Casso... whoops missing variables in new subfunction after
2022-07-21 Luke Kenneth Casso... add dsubstep to ISACaller
2022-07-21 Luke Kenneth Casso... sort out subvl unit test with expected results
2022-07-21 Luke Kenneth Casso... fix loopend conditions for subvectors in ISACaller
2022-07-20 Luke Kenneth Casso... rename substep to ssubstep, add dsubstep to SVP64State
2022-07-20 Luke Kenneth Casso... add first subvl unit test, subvl comes from
2022-07-18 Luke Kenneth Casso... move D-Immediate rewriting in ISACaller into separate...
2022-07-18 Luke Kenneth Casso... move inputs in ISACaller into get_input()
2022-07-18 Luke Kenneth Casso... move debug remap to ISACaller.remap_debug()
2022-07-18 Luke Kenneth Casso... whitespace and function-return code-morphing in ISACaller
2022-07-18 Luke Kenneth Casso... move another function in ISACaller (check_write)
2022-07-18 Luke Kenneth Casso... begin function split in ISACaller
2022-07-18 Luke Kenneth Casso... remove duplicate code create ISACaller.advance_svstate_...
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