power_insn: introduce common Sat RM class
[openpower-isa.git] / src /
2022-09-18 Dmitry Selyutinpower_insn: introduce common Sat RM class
2022-09-18 Dmitry Selyutinpower_insn: introduce common FFPRRc0 RM class
2022-09-18 Dmitry Selyutinpower_insn: simplify RM classes naming
2022-09-18 Luke Kenneth Casso... add first attempt at swapping inner/outer vl/subvl...
2022-09-18 Luke Kenneth Casso... sigh, check length of string returned, if non-zero...
2022-09-18 Luke Kenneth Casso... sort out CR RM Mode (sz/dz bits moved, consistent)
2022-09-18 Luke Kenneth Casso... add comments (links to URLs) into power_insns.py for...
2022-09-18 Luke Kenneth Casso... remove f"" use simpler code, easier to read
2022-09-18 Luke Kenneth Casso... reverse decode_bo inv/eq/lt/le/etc. thing
2022-09-18 Luke Kenneth Casso... dumb. accidentally removed test-call
2022-09-18 Luke Kenneth Casso... add unit tests for Rc=1 ffirst/predicate-result
2022-09-18 Dmitry Selyutintest_pysvp64dis: test RC1/~RC1 in ff/pr
2022-09-18 Dmitry Selyutinpower_insn: fix Rc operand accessor
2022-09-18 Dmitry Selyutinpower_insn: support RC1/~RC1 in ff/pr
2022-09-18 Luke Kenneth Casso... comment principle behind new tables in power_insn.py
2022-09-18 Luke Kenneth Casso... redo branch mode as a table, in power_insn.py
2022-09-18 Dmitry Selyutinpower_insn: adjust table comments
2022-09-18 Dmitry Selyutinpower_insn: another minor ld/st imm table cleanup
2022-09-18 Dmitry Selyutinpysvp64asm: make zz also set src_zero
2022-09-18 Dmitry Selyutinpower_insn: minor CR cleanup
2022-09-18 Dmitry Selyutinpower_insn: minor cleanup
2022-09-18 Luke Kenneth Casso... code-morph CR ops to table in power_insn.py
2022-09-18 Luke Kenneth Casso... code-morph in power_insn.py - move table-search to...
2022-09-18 Luke Kenneth Casso... LDST_IDX Mode converted to table
2022-09-18 Dmitry Selyutinpower_insn: support m/sm/dm specifiers
2022-09-18 Dmitry Selyutinpower_insn: pass record to specifiers
2022-09-18 Luke Kenneth Casso... replace LDST_IMM mode with mask/value match table in...
2022-09-18 Luke Kenneth Casso... remove (invalid) NormalSaturationExtRM mode from power_...
2022-09-18 Luke Kenneth Casso... reduce NORMAL svp64 mode down to a mask-value search
2022-09-18 Luke Kenneth Casso... remove subvector mode from power_insn.py
2022-09-18 Luke Kenneth Casso... adapt test_12_mr to /mrr and /mr modes, svm is gone...
2022-09-18 Dmitry Selyutintest_pysvp64dis: test mrr/svm specifiers
2022-09-18 Dmitry Selyutinpower_fields: fix __lt__ operator
2022-09-18 Dmitry Selyutinpower_insn: support mrr specifier
2022-09-18 Dmitry Selyutinpower_insn: support svm specifier
2022-09-18 Dmitry Selyutinpower_insn: sync RM modes
2022-09-18 Luke Kenneth Casso... remove subvector mode from sv/trans/svp64.py
2022-09-18 Dmitry Selyutinpower_insn: support w/dw/sw specifiers
2022-09-18 Dmitry Selyutinpower_insn: decouple branch modes
2022-09-18 Dmitry Selyutinpower_insn: decouple cr_op modes
2022-09-18 Luke Kenneth Casso... change sv/trans/svp64.py source/dest elwidth assembler...
2022-09-18 Dmitry Selyutintest_pysvp64dis: test sw specifier
2022-09-18 Dmitry Selyutinpower_insn: support sw specifier
2022-09-18 Dmitry Selyutinpower_insn: decouple common normal and ld/st RM
2022-09-18 Dmitry Selyutinpower_insn: support ew specifier
2022-09-18 Dmitry Selyutinpower_insn: simplify subvl disassembly
2022-09-17 Luke Kenneth Casso... add sat/satu test_12_sat to test_pysvp64dis.py
2022-09-17 Dmitry Selyutinpower_insn: fix sat checks
2022-09-17 Dmitry Selyutinpysvp64asm: SVP64 instruction debug logs
2022-09-17 Luke Kenneth Casso... whoops. mode-bits need to be put in MSB0 order. sigh
2022-09-17 Dmitry Selyutinpower_fields: fix mapping class accessor
2022-09-17 Dmitry Selyutinpower_fields: support boolean checks
2022-09-17 Dmitry Selyutinpower_insn: fix zz specifiers
2022-09-17 Dmitry Selyutinpower_insn: drop field length method again
2022-09-17 Dmitry Selyutinpower_insn: decouple base ld/st idx RM
2022-09-17 Dmitry Selyutinpower_insn: decouple base ld/st imm RM
2022-09-17 Dmitry Selyutinpower_insn: decouple base normal RM
2022-09-17 Dmitry Selyutinpower_insn: support saturation mode
2022-09-17 Dmitry Selyutinpower_insn: support dz/sz specifiers
2022-09-17 Luke Kenneth Casso... add zz mode to sv/trans/svp64.py as a hack
2022-09-17 Luke Kenneth Casso... remove sv.setvl/pk/up/pu - these are all gone in favour...
2022-09-17 Luke Kenneth Casso... add MASK_SRC to power_insn.py (SVmask_src from enums)
2022-09-17 Luke Kenneth Casso... add SVmask_src enum, rename fields to EN and NO to...
2022-09-17 Luke Kenneth Casso... as a double-check sv_analysis new CSV column "SM" was...
2022-09-17 Luke Kenneth Casso... add a "SM" column into RM*.csv (and LDSTRM*.csv) identi...
2022-09-17 Luke Kenneth Casso... add sv.add/ew=XX test to test_pysvp64dis.py
2022-09-17 Luke Kenneth Casso... remove pack/unpack modes from power_insn.py, they no...
2022-09-17 Dmitry Selyutinselectable_int: drop redundant operators
2022-09-17 Dmitry Selyutinpower_insn: support vec2/vec3/vec4
2022-09-17 Dmitry Selyutinpower_insn: support specifiers
2022-09-17 Dmitry Selyutinpower_fields: fix comparison operators
2022-09-17 Dmitry Selyutinpower_insn: refactor and fix RM mappings
2022-09-17 Dmitry Selyutinpower_fields: fix field slicing
2022-09-17 Dmitry Selyutinpower_insn: fix mapping bits accessors
2022-09-17 Dmitry Selyutinpower_fields: support traversing over instances
2022-09-17 Dmitry Selyutinpower_insn: drop redundant table
2022-09-17 Dmitry Selyutinpower_fields: inherit docstrings upon remap
2022-09-17 Luke Kenneth Casso... add vec2/3/4 test_pysvp64dis test
2022-09-16 Luke Kenneth Casso... comments on test_9_fptrans
2022-09-16 Dmitry Selyutintest_power_decoder: mark minor_19.csv as opint
2022-09-16 Dmitry Selyutintest_pysvp64dis: test fptrans
2022-09-16 Dmitry Selyutinselectable_int: replace bit_count with bit_length
2022-09-16 Dmitry Selyutinsv_binutils_fptrans: adopt script for reuse
2022-09-16 Dmitry Selyutinpower_insn: postpone updating per-instruction operands
2022-09-15 Dmitry Selyutinpower_insn: perform faster PPC database lookups
2022-09-15 Dmitry Selyutinsv_binutils_fptrans: fix disassembly
2022-09-15 Dmitry Selyutinsv_binutils_fptrans: fptrans binutils generator
2022-09-15 Dmitry Selyutinpower_insn: support instruction bytes conversion
2022-09-15 Dmitry Selyutinselectable_int: allow setting multiple bit
2022-09-15 Dmitry Selyutinpower_insn: allow accessing instruction bits
2022-09-15 Luke Kenneth Casso... add minor_4.csv for maddld/maddhdu/maddhd and to insn_d...
2022-09-15 Luke Kenneth Casso... fix sprset mtspr/mfspr pseudocode with wrong definition of
2022-09-14 Jacob Lifshayadd svp64 fptrans tests
2022-09-14 Jacob Lifshayinclude *all* fprs/gprs/cr-fields in SimState
2022-09-14 Jacob Lifshayfix sv_analysis for fpown and frootn
2022-09-14 Jacob Lifshayfix some typos
2022-09-13 Dmitry Selyutinpower_insn: support signed operands
2022-09-13 Dmitry Selyutinpower_insn: support branch RM
2022-09-13 Dmitry Selyutinpower_insn: support CR RM
2022-09-13 Dmitry Selyutinpower_enums: convert SVExtra to RegType
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