git.libre-soc.org Git - litex.git/history

2013-03-29	Sebastien Bourdeauducq	m1crg: reset VGA clock generator	blob \| commitdiff \| raw
2013-03-28	Sebastien Bourdeauducq	m1crg: allow up to 150MHz pixel clock	blob \| commitdiff \| raw \| diff to current
2013-03-28	Sebastien Bourdeauducq	crg: support VGA pixel clock reprogramming	blob \| commitdiff \| raw \| diff to current
2013-03-17	Sebastien Bourdeauducq	m1crg: set CLKIN_PERIOD for vga_clock_gen	blob \| commitdiff \| raw \| diff to current
2013-02-24	Sebastien Bourdeauducq	m1crg: advance off-chip DDR clock phase	blob \| commitdiff \| raw \| diff to current
2013-02-13	Sebastien Bourdeauducq	m1crg: fix signal names	blob \| commitdiff \| raw \| diff to current
2013-02-11	Sebastien Bourdeauducq	Use Mibuild	blob \| commitdiff \| raw \| diff to current
2012-09-10	Sebastien Bourdeauducq	Define clock domains instead of passing extra clocks...	blob \| commitdiff \| raw \| diff to current
2012-06-17	Sebastien Bourdeauducq	VGA framebuffer connections	blob \| commitdiff \| raw \| diff to current
2012-05-24	Sebastien Bourdeauducq	Remove some boilerplate	blob \| commitdiff \| raw \| diff to current
2012-05-19	Sebastien Bourdeauducq	Add Ethernet MAC	blob \| commitdiff \| raw \| diff to current
2012-02-20	Sebastien Bourdeauducq	s6ddrphy: write path OK in simulation	blob \| commitdiff \| raw \| diff to current
2012-02-19	Sebastien Bourdeauducq	Prepare for new DDR PHY	blob \| commitdiff \| raw \| diff to current
2012-02-16	Sebastien Bourdeauducq	Generate all clocks for the DDR PHY	blob \| commitdiff \| raw \| diff to current