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software/include: add stdbool.h
[litex.git] / verilog /
2012-12-01 Sebastien BourdeauducqMerge branch 'master' of github.com:milkymist/milkymist-ng tree | commitdiff
2012-11-30 Michael Wallelm32: fix watchpoints tree | commitdiff
2012-11-14 Michael Wallelm32: replace $clog2 with macro tree | commitdiff
2012-11-14 Sebastien Bourdeauducqlm32: split lm32_include.v tree | commitdiff
2012-11-14 Michael Wallelm32: fix documentation style tree | commitdiff
2012-11-14 Michael Wallelm32: remove unneeded parameter in lm32_dp_ram tree | commitdiff
2012-11-14 Michael Wallelm32: rename mem array in lm32_dp_ram tree | commitdiff
2012-11-14 Michael Wallelm32: replace clogb2 by builtin $clog2 tree | commitdiff
2012-09-10 Sebastien BourdeauducqDefine clock domains instead of passing extra clocks... tree | commitdiff
2012-07-07 Sebastien Bourdeauducqframebuffer: fix FIFO read clocking tree | commitdiff
2012-07-01 Sebastien Bourdeauducqframebuffer: FIFO tree | commitdiff
2012-06-17 Sebastien BourdeauducqVGA framebuffer connections tree | commitdiff
2012-05-24 Sebastien BourdeauducqRemove some boilerplate tree | commitdiff
2012-05-19 Sebastien BourdeauducqAdd Ethernet MAC tree | commitdiff
2012-03-14 Sebastien Bourdeauducqasmicon: skeleton tree | commitdiff
2012-02-24 Sebastien Bourdeauducqddrphy: working on hardware, simulation a bit messed up tree | commitdiff
2012-02-24 Sebastien Bourdeauducqddrphy: request wrdata_en/rddata_en at the same time... tree | commitdiff
2012-02-24 Sebastien Bourdeauducqddrphy: reads OK, write data coming out 1/2 cycle too... tree | commitdiff
2012-02-24 Sebastien Bourdeauducqddrphy: partly working tree | commitdiff
2012-02-21 Sebastien Bourdeauducqs6ddrphy: read path OK in simulation tree | commitdiff
2012-02-20 Sebastien Bourdeauducqs6ddrphy: write path OK in simulation tree | commitdiff
2012-02-20 Sebastien Bourdeauducqs6ddrphy: generate DQ/DQS/DM OE tree | commitdiff
2012-02-20 Sebastien Bourdeauducqs6ddrphy: DQ/DQS/DM SERDES tree | commitdiff
2012-02-19 Sebastien Bourdeauducqs6ddrphy: clock, address and command tree | commitdiff
2012-02-19 Sebastien BourdeauducqPrepare for new DDR PHY tree | commitdiff
2012-02-17 Sebastien Bourdeauducqs6ddrphy: use single-ended DQS tree | commitdiff
2012-02-16 Sebastien BourdeauducqGenerate all clocks for the DDR PHY tree | commitdiff
2012-02-14 Sebastien Bourdeauducqs6ddrphy: prepare quilt tree | commitdiff
2012-02-06 Sebastien BourdeauducqLM32: make IP read-only and interrupt lines level-sensitive tree | commitdiff
2011-12-17 Sebastien Bourdeauducquart: new design using FHDL and bank (TX only, incomplete) tree | commitdiff
2011-12-17 Sebastien Bourdeauducq32-device, 8-bit CSR bus tree | commitdiff
2011-12-16 Sebastien BourdeauducqProper reset generation tree | commitdiff
2011-12-13 Sebastien BourdeauducqInitial import tree | commitdiff