lkcl [Wed, 23 Feb 2022 04:12:44 +0000 (04:12 +0000)]
lkcl [Wed, 23 Feb 2022 01:15:46 +0000 (01:15 +0000)]
lkcl [Mon, 21 Feb 2022 19:21:38 +0000 (19:21 +0000)]
lkcl [Mon, 21 Feb 2022 19:20:14 +0000 (19:20 +0000)]
lkcl [Mon, 21 Feb 2022 17:55:14 +0000 (17:55 +0000)]
Luke Kenneth Casson Leighton [Mon, 21 Feb 2022 17:52:10 +0000 (17:52 +0000)]
add stub board support page
lkcl [Mon, 21 Feb 2022 13:47:00 +0000 (13:47 +0000)]
TimothyPearson [Mon, 21 Feb 2022 13:39:43 +0000 (13:39 +0000)]
Luke Kenneth Casson Leighton [Fri, 18 Feb 2022 21:22:45 +0000 (21:22 +0000)]
refer to gitlab nmigen
Andrey Miroshnikov [Fri, 18 Feb 2022 00:21:22 +0000 (00:21 +0000)]
Forgot to fix the year, definitely 2022 haha
Andrey Miroshnikov [Thu, 17 Feb 2022 21:19:54 +0000 (21:19 +0000)]
Forgot to move to NLNet paid
Andrey Miroshnikov [Thu, 17 Feb 2022 21:18:24 +0000 (21:18 +0000)]
Added paid date for last task
programmerjake [Wed, 16 Feb 2022 05:45:10 +0000 (05:45 +0000)]
add toc and simple loop variants
programmerjake [Wed, 16 Feb 2022 00:56:43 +0000 (00:56 +0000)]
add tables for 8-wide fetch/decode
programmerjake [Tue, 15 Feb 2022 23:48:07 +0000 (23:48 +0000)]
programmerjake [Tue, 15 Feb 2022 23:45:25 +0000 (23:45 +0000)]
lkcl [Tue, 15 Feb 2022 18:17:13 +0000 (18:17 +0000)]
Andrey Miroshnikov [Tue, 15 Feb 2022 11:39:03 +0000 (11:39 +0000)]
Fixed shift input signal name and added note about color properties
lkcl [Tue, 15 Feb 2022 06:34:28 +0000 (06:34 +0000)]
lkcl [Tue, 15 Feb 2022 06:07:23 +0000 (06:07 +0000)]
lkcl [Tue, 15 Feb 2022 06:02:08 +0000 (06:02 +0000)]
lkcl [Tue, 15 Feb 2022 05:54:16 +0000 (05:54 +0000)]
lkcl [Tue, 15 Feb 2022 05:52:04 +0000 (05:52 +0000)]
Andrey Miroshnikov [Mon, 14 Feb 2022 17:17:05 +0000 (17:17 +0000)]
Fixed signal names basd on naming convention change.
lkcl [Sun, 13 Feb 2022 19:28:46 +0000 (19:28 +0000)]
lkcl [Sun, 13 Feb 2022 18:07:45 +0000 (18:07 +0000)]
lkcl [Sun, 13 Feb 2022 07:35:44 +0000 (07:35 +0000)]
lkcl [Sat, 12 Feb 2022 16:02:23 +0000 (16:02 +0000)]
lkcl [Fri, 11 Feb 2022 16:47:43 +0000 (16:47 +0000)]
lkcl [Fri, 11 Feb 2022 13:28:59 +0000 (13:28 +0000)]
lkcl [Fri, 11 Feb 2022 13:13:19 +0000 (13:13 +0000)]
Andrey Miroshnikov [Thu, 10 Feb 2022 17:49:54 +0000 (17:49 +0000)]
Added auto-generated bug info from budget-sync
Andrey Miroshnikov [Thu, 10 Feb 2022 16:11:01 +0000 (16:11 +0000)]
Added the bugs I've been working on
Mikolaj Wielgus [Wed, 9 Feb 2022 17:19:25 +0000 (17:19 +0000)]
Remove myself from the project wiki
lkcl [Tue, 8 Feb 2022 23:12:16 +0000 (23:12 +0000)]
Luke Kenneth Casson Leighton [Tue, 8 Feb 2022 14:43:03 +0000 (14:43 +0000)]
cross-link to gitlab rst files
Luke Kenneth Casson Leighton [Tue, 8 Feb 2022 14:34:28 +0000 (14:34 +0000)]
add CSS gtkwave FOSDEM2022 talk
Luke Kenneth Casson Leighton [Tue, 8 Feb 2022 14:33:54 +0000 (14:33 +0000)]
add links to git commit message advice
lkcl [Mon, 7 Feb 2022 00:20:33 +0000 (00:20 +0000)]
lkcl [Sat, 5 Feb 2022 00:31:47 +0000 (00:31 +0000)]
programmerjake [Wed, 2 Feb 2022 12:48:39 +0000 (12:48 +0000)]
add reason to prefer one reduce pseudo-code over the other
lkcl [Tue, 1 Feb 2022 21:25:25 +0000 (21:25 +0000)]
Tobias Platen [Tue, 1 Feb 2022 20:05:16 +0000 (21:05 +0100)]
update docs
Tobias Platen [Tue, 1 Feb 2022 20:02:39 +0000 (21:02 +0100)]
add documentation how to build microwatt using libre soc core
Luke Kenneth Casson Leighton [Tue, 1 Feb 2022 10:29:47 +0000 (10:29 +0000)]
add another wildcard import link
Luke Kenneth Casson Leighton [Tue, 1 Feb 2022 10:22:59 +0000 (10:22 +0000)]
add removestar link to HDL_workflow
lkcl [Sat, 29 Jan 2022 23:31:33 +0000 (23:31 +0000)]
lkcl [Sat, 29 Jan 2022 23:30:03 +0000 (23:30 +0000)]
Tobias Platen [Sat, 29 Jan 2022 13:41:30 +0000 (14:41 +0100)]
begin integrate from chatlogs
Luke Kenneth Casson Leighton [Sat, 29 Jan 2022 10:40:02 +0000 (10:40 +0000)]
add verilator and yosys links
lkcl [Fri, 28 Jan 2022 16:19:26 +0000 (16:19 +0000)]
lkcl [Fri, 28 Jan 2022 16:17:11 +0000 (16:17 +0000)]
lkcl [Fri, 28 Jan 2022 15:53:06 +0000 (15:53 +0000)]
lkcl [Thu, 27 Jan 2022 23:37:30 +0000 (23:37 +0000)]
lkcl [Thu, 27 Jan 2022 23:36:39 +0000 (23:36 +0000)]
lkcl [Thu, 27 Jan 2022 19:11:38 +0000 (19:11 +0000)]
Andrey Miroshnikov [Wed, 26 Jan 2022 22:04:06 +0000 (22:04 +0000)]
Forgot to update pinmux image link
Andrey Miroshnikov [Wed, 26 Jan 2022 22:02:21 +0000 (22:02 +0000)]
Updated 1-bit gpio jtag diagram, removed n-bit (which is no longer relevant)
Andrey Miroshnikov [Wed, 26 Jan 2022 21:49:34 +0000 (21:49 +0000)]
Adding diagram for 4-bit gpio jtag case
Tobias Platen [Wed, 26 Jan 2022 15:41:19 +0000 (16:41 +0100)]
update microwatt kernel docs
Tobias Platen [Tue, 25 Jan 2022 19:28:43 +0000 (20:28 +0100)]
Merge branch 'master' of ssh://git.libre-riscv.org:922/libreriscv
Tobias Platen [Tue, 25 Jan 2022 19:28:20 +0000 (20:28 +0100)]
WIP docs how to build the kernel
Luke Kenneth Casson Leighton [Mon, 24 Jan 2022 16:29:19 +0000 (16:29 +0000)]
add 2nd version of mux jtag
Luke Kenneth Casson Leighton [Mon, 24 Jan 2022 13:40:38 +0000 (13:40 +0000)]
add mux jtag image
Luke Kenneth Casson Leighton [Mon, 24 Jan 2022 13:37:19 +0000 (13:37 +0000)]
add cnect2022 presentation
Andrey Miroshnikov [Mon, 24 Jan 2022 12:13:58 +0000 (12:13 +0000)]
Forgot the images...
Andrey Miroshnikov [Mon, 24 Jan 2022 12:06:43 +0000 (12:06 +0000)]
Added GPIO/JTAG connectivity proposal
Andrey Miroshnikov [Sat, 22 Jan 2022 22:43:19 +0000 (22:43 +0000)]
Moved GPIO theory to the main page, second page will have testing and sim
Andrey Miroshnikov [Sat, 22 Jan 2022 22:01:08 +0000 (22:01 +0000)]
Mentioned ie, which wshould also be passed to banked peripherals
Andrey Miroshnikov [Sat, 22 Jan 2022 21:51:37 +0000 (21:51 +0000)]
Fixed embedded images
Andrey Miroshnikov [Sat, 22 Jan 2022 21:50:07 +0000 (21:50 +0000)]
Updated information on the pinmux GPIO block, added diagrams
Tobias Platen [Sat, 22 Jan 2022 13:48:32 +0000 (14:48 +0100)]
remove dead links
Tobias Platen [Sat, 22 Jan 2022 13:39:48 +0000 (14:39 +0100)]
update ghdl.mdwn
Tobias Platen [Sat, 22 Jan 2022 13:36:20 +0000 (14:36 +0100)]
add microwatt docs
Tobias Platen [Sat, 22 Jan 2022 13:21:28 +0000 (14:21 +0100)]
whitespace
Tobias Platen [Sat, 22 Jan 2022 13:19:46 +0000 (14:19 +0100)]
correct indention
Tobias Platen [Sat, 22 Jan 2022 13:17:54 +0000 (14:17 +0100)]
update ghdl.mdwn
Tobias Platen [Sat, 22 Jan 2022 13:08:06 +0000 (14:08 +0100)]
state my pronouns
Tobias Platen [Sat, 22 Jan 2022 13:06:17 +0000 (14:06 +0100)]
update deadlinks
lkcl [Fri, 21 Jan 2022 16:03:04 +0000 (16:03 +0000)]
lkcl [Wed, 19 Jan 2022 23:14:33 +0000 (23:14 +0000)]
Andrey Miroshnikov [Tue, 18 Jan 2022 14:39:39 +0000 (14:39 +0000)]
Changing GPIO information to reflect recent changes
lkcl [Fri, 14 Jan 2022 18:55:47 +0000 (18:55 +0000)]
lkcl [Fri, 14 Jan 2022 13:32:38 +0000 (13:32 +0000)]
Andrey Miroshnikov [Thu, 13 Jan 2022 00:41:47 +0000 (00:41 +0000)]
Added GPIO block explanation
Andrey Miroshnikov [Tue, 11 Jan 2022 23:34:44 +0000 (23:34 +0000)]
Added some more JTAG test info
Andrey Miroshnikov [Mon, 10 Jan 2022 23:21:40 +0000 (23:21 +0000)]
fix numbered list formatting, sigh
Andrey Miroshnikov [Mon, 10 Jan 2022 23:20:26 +0000 (23:20 +0000)]
Adding JTAG test info
Andrey Miroshnikov [Mon, 10 Jan 2022 12:54:42 +0000 (12:54 +0000)]
Added a bit more, still todo
Andrey Miroshnikov [Sat, 8 Jan 2022 21:59:28 +0000 (21:59 +0000)]
Cleaned up, adding more. Will merge some with main pinmux as there's a lot of redundancy
Andrey Miroshnikov [Sat, 8 Jan 2022 21:49:14 +0000 (21:49 +0000)]
JTAG UART example correction
Andrey Miroshnikov [Sat, 8 Jan 2022 17:51:16 +0000 (17:51 +0000)]
Adding a page on additional info regarding JTAG/pinmux test code
Andrey Miroshnikov [Sat, 8 Jan 2022 00:44:31 +0000 (00:44 +0000)]
Added I/O mux block digram I drew on Thursday, see bug #50
Jacob Lifshay [Thu, 6 Jan 2022 04:32:22 +0000 (20:32 -0800)]
add todos
Jacob Lifshay [Thu, 6 Jan 2022 03:07:55 +0000 (19:07 -0800)]
convert bitmanip ops to use X/XO-forms rather than custom forms
https://bugs.libre-soc.org/show_bug.cgi?id=757
lkcl [Tue, 4 Jan 2022 16:07:16 +0000 (16:07 +0000)]
lkcl [Wed, 29 Dec 2021 00:25:28 +0000 (00:25 +0000)]
lkcl [Mon, 27 Dec 2021 00:18:10 +0000 (00:18 +0000)]
lkcl [Fri, 24 Dec 2021 23:36:45 +0000 (23:36 +0000)]
Luke Kenneth Casson Leighton [Fri, 24 Dec 2021 17:46:17 +0000 (17:46 +0000)]
use wiki links
projects / libreriscv.git / log